From 0376e7c4aa2ce9ae94d72555cea27cd7aff8e32a Mon Sep 17 00:00:00 2001 From: Achin Gupta Date: Fri, 11 Oct 2019 14:44:05 +0100 Subject: [PATCH 1/2] Add support for enabling S-EL2 This patch adds support for enabling S-EL2 if this EL is specified in the entry point information being used to initialise a secure context. It is the caller's responsibility to check if S-EL2 is available on the system before requesting this EL through the entry point information. Signed-off-by: Achin Gupta Change-Id: I2752964f078ab528b2e80de71c7d2f35e60569e1 --- include/arch/aarch64/arch.h | 3 +++ lib/el3_runtime/aarch64/context_mgmt.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index 3ff2912f1..e48e20185 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -140,6 +140,8 @@ #define ID_AA64PFR0_GIC_MASK ULL(0xf) #define ID_AA64PFR0_SVE_SHIFT U(32) #define ID_AA64PFR0_SVE_MASK ULL(0xf) +#define ID_AA64PFR0_SEL2_SHIFT U(36) +#define ID_AA64PFR0_SEL2_MASK U(0xf) #define ID_AA64PFR0_MPAM_SHIFT U(40) #define ID_AA64PFR0_MPAM_MASK ULL(0xf) #define ID_AA64PFR0_DIT_SHIFT U(48) @@ -285,6 +287,7 @@ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) #define SCR_ATA_BIT (U(1) << 26) #define SCR_FIEN_BIT (U(1) << 21) +#define SCR_EEL2_BIT (U(1) << 18) #define SCR_API_BIT (U(1) << 17) #define SCR_APK_BIT (U(1) << 16) #define SCR_TWE_BIT (U(1) << 13) diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index d65e02d5e..752a2606e 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -181,6 +181,10 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) scr_el3 |= SCR_HCE_BIT; } + /* Enable S-EL2 if the next EL is EL2 and security state is secure */ + if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) + scr_el3 |= SCR_EEL2_BIT; + /* * Initialise SCTLR_EL1 to the reset value corresponding to the target * execution state setting all fields rather than relying of the hw. From db3ae8538b8a2cc89e2211201ec96df72e597ae0 Mon Sep 17 00:00:00 2001 From: Artsem Artsemenka Date: Tue, 26 Nov 2019 16:40:31 +0000 Subject: [PATCH 2/2] S-EL2 Support: Check for AArch64 Check that entry point information requesting S-EL2 has AArch64 as an execution state during context setup. Signed-off-by: Artsem Artsemenka Change-Id: I447263692fed6e55c1b076913e6eb73b1ea735b7 --- include/arch/aarch64/arch.h | 2 +- lib/el3_runtime/aarch64/context_mgmt.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index e48e20185..1fcd0f9ba 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -141,7 +141,7 @@ #define ID_AA64PFR0_SVE_SHIFT U(32) #define ID_AA64PFR0_SVE_MASK ULL(0xf) #define ID_AA64PFR0_SEL2_SHIFT U(36) -#define ID_AA64PFR0_SEL2_MASK U(0xf) +#define ID_AA64PFR0_SEL2_MASK ULL(0xf) #define ID_AA64PFR0_MPAM_SHIFT U(40) #define ID_AA64PFR0_MPAM_MASK ULL(0xf) #define ID_AA64PFR0_DIT_SHIFT U(48) diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 752a2606e..b7908adec 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -182,8 +182,14 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) } /* Enable S-EL2 if the next EL is EL2 and security state is secure */ - if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) + if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) { + if (GET_RW(ep->spsr) != MODE_RW_64) { + ERROR("S-EL2 can not be used in AArch32."); + panic(); + } + scr_el3 |= SCR_EEL2_BIT; + } /* * Initialise SCTLR_EL1 to the reset value corresponding to the target