From 19e2af7977937b13513f448e0e162df9847b4068 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Wed, 2 Oct 2019 16:33:41 +0200 Subject: [PATCH 1/4] crypto: stm32_hash: align stm32_hash_update() prototype Use size_t for length parameter in header file, as in .c file. Change-Id: I310f2a6159cde1c069b4f814f6558c2488c203ec Signed-off-by: Yann Gautier --- include/drivers/st/stm32_hash.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drivers/st/stm32_hash.h b/include/drivers/st/stm32_hash.h index 969d7aa13..df04730d6 100644 --- a/include/drivers/st/stm32_hash.h +++ b/include/drivers/st/stm32_hash.h @@ -14,7 +14,7 @@ enum stm32_hash_algo_mode { HASH_SHA256 }; -int stm32_hash_update(const uint8_t *buffer, uint32_t length); +int stm32_hash_update(const uint8_t *buffer, size_t length); int stm32_hash_final(uint8_t *digest); int stm32_hash_final_update(const uint8_t *buffer, uint32_t buf_length, uint8_t *digest); From 57f4b6f83974b17e0aae04e17f9d95a5659ac88b Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Fri, 16 Aug 2019 16:49:41 +0200 Subject: [PATCH 2/4] mmc: increase delay between ACMD41 retries In the SD Specification, Power Up Diagram of Card figure, the Timeout value for initialization process (ACMD41 command retries) is 1 second. Align to match MMC cards (in mmc_send_op_cond()) and Linux kernel code, and set the delay between ACMD41 command retries to 10ms. Change-Id: I2e07cb9944e7d7b72f2d4b13e0505e6751458091 Signed-off-by: Yann Gautier --- drivers/mmc/mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index db6f3f9e4..b5f6a10d3 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -361,7 +361,7 @@ static int sd_send_op_cond(void) return 0; } - mdelay(1); + mdelay(10); } ERROR("ACMD41 failed after %d retries\n", SEND_OP_COND_MAX_RETRIES); From 2dc9fe70da6788ff69856ed247b10a59173431c3 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Mon, 29 Jul 2019 14:46:16 +0200 Subject: [PATCH 3/4] fdts: stm32mp1: move FDCAN to PLL4_R LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead caches the value at probe and pretends to use it later. This change fixes the issue by moving the FDCAN to PLL4_R, leaving the LTDC alone on PLL4_Q. Signed-off-by: Antonio Borneo Signed-off-by: Yann Gautier Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58 --- fdts/stm32mp157a-avenger96.dts | 2 +- fdts/stm32mp157a-dk1.dts | 2 +- fdts/stm32mp157c-ed1.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/fdts/stm32mp157a-avenger96.dts b/fdts/stm32mp157a-avenger96.dts index 9df72b444..907940c78 100644 --- a/fdts/stm32mp157a-avenger96.dts +++ b/fdts/stm32mp157a-avenger96.dts @@ -246,7 +246,7 @@ CLK_UART6_HSI CLK_UART78_HSI CLK_SPDIF_PLL4P - CLK_FDCAN_PLL4Q + CLK_FDCAN_PLL4R CLK_SAI1_PLL3Q CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q diff --git a/fdts/stm32mp157a-dk1.dts b/fdts/stm32mp157a-dk1.dts index b17d50194..4ea83f7cd 100644 --- a/fdts/stm32mp157a-dk1.dts +++ b/fdts/stm32mp157a-dk1.dts @@ -266,7 +266,7 @@ CLK_UART6_HSI CLK_UART78_HSI CLK_SPDIF_PLL4P - CLK_FDCAN_PLL4Q + CLK_FDCAN_PLL4R CLK_SAI1_PLL3Q CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q diff --git a/fdts/stm32mp157c-ed1.dts b/fdts/stm32mp157c-ed1.dts index ed55725b0..779492552 100644 --- a/fdts/stm32mp157c-ed1.dts +++ b/fdts/stm32mp157c-ed1.dts @@ -272,7 +272,7 @@ CLK_UART6_HSI CLK_UART78_HSI CLK_SPDIF_PLL4P - CLK_FDCAN_PLL4Q + CLK_FDCAN_PLL4R CLK_SAI1_PLL3Q CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q From 243b61d15aaa59794e73769de7be64f02223cfad Mon Sep 17 00:00:00 2001 From: Nicolas Le Bayon Date: Wed, 11 Sep 2019 15:58:31 +0200 Subject: [PATCH 4/4] gpio: stm32_gpio: do not mix error code types Change-Id: I84f8a99be2dcdf7c51fbecdb324df8e2f32cc855 Signed-off-by: Nicolas Le Bayon Signed-off-by: Yann Gautier --- drivers/st/gpio/stm32_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/st/gpio/stm32_gpio.c b/drivers/st/gpio/stm32_gpio.c index 343ad6c1d..a13c341a8 100644 --- a/drivers/st/gpio/stm32_gpio.c +++ b/drivers/st/gpio/stm32_gpio.c @@ -165,7 +165,7 @@ int dt_set_pinctrl_config(int node) void *fdt; if (fdt_get_address(&fdt) == 0) { - return -ENOENT; + return -FDT_ERR_NOTFOUND; } if (status == DT_DISABLED) {