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fix: random typos in tf-a code base 

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Id610f7e4398e799a2fbd74861274fd684c32db53
This commit is contained in:
Olivier Deprez 2021-05-25 12:06:03 +02:00
parent 203d48adca
commit 2e61d6871c
3 changed files with 6 additions and 6 deletions
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4
lib/cpus/aarch64/cpu_helpers.S
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2020, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2021, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -144,7 +144,7 @@ endfunc do_cpu_reg_dump
* If cpu_ops for the MIDR_EL1 cannot be found and
* SUPPORT_UNKNOWN_MPID is enabled, it will try to look for a
* default cpu_ops with an MIDR value of 0.
* (Implementation number 0x0 should be reseverd for software use
* (Implementation number 0x0 should be reserved for software use
* and therefore no clashes should happen with that default value).
*
* Return :

4
lib/el3_runtime/aarch32/context_mgmt.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -49,7 +49,7 @@ void cm_init(void)
*
* To prepare the register state for entry call cm_prepare_el3_exit() and
* el3_exit(). For Secure-EL1 cm_prepare_el3_exit() is equivalent to
* cm_e1_sysreg_context_restore().
* cm_el1_sysregs_context_restore().
******************************************************************************/
void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
{

4
lib/el3_runtime/aarch64/context_mgmt.c
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@ -60,7 +60,7 @@ void __init cm_init(void)
*
* To prepare the register state for entry call cm_prepare_el3_exit() and
* el3_exit(). For Secure-EL1 cm_prepare_el3_exit() is equivalent to
* cm_e1_sysreg_context_restore().
* cm_el1_sysregs_context_restore().
******************************************************************************/
void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
{
@ -286,7 +286,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
/*
* Store the initialised SCTLR_EL1 value in the cpu_context - SCTLR_EL2
* and other EL2 registers are set up by cm_prepare_ns_entry() as they
* and other EL2 registers are set up by cm_prepare_el3_exit() as they
* are not part of the stored cpu_context.
*/
write_ctx_reg(get_el1_sysregs_ctx(ctx), CTX_SCTLR_EL1, sctlr_elx);