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Merge "hikey960: Enable system power off callback" into integration

This commit is contained in:
Sandrine Bailleux 2020-03-11 09:34:12 +00:00 committed by TrustedFirmware Code Review
parent f56081e360 cfde1870ca
commit 2f006b2c66
5 changed files with 28 additions and 2 deletions
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1
plat/hisilicon/hikey960/hikey960_bl31_setup.c
View File

@ -166,6 +166,7 @@ void bl31_platform_setup(void)
hikey960_edma_init();
hikey960_iomcu_dma_init();
hikey960_gpio_init();
hisi_ipc_init();
}

7
plat/hisilicon/hikey960/hikey960_bl_common.c
View File

@ -466,6 +466,13 @@ void hikey960_gpio_init(void)
pl061_gpio_register(GPIO19_BASE, 19);
pl061_gpio_register(GPIO20_BASE, 20);
pl061_gpio_register(GPIO21_BASE, 21);
pl061_gpio_register(GPIO22_BASE, 22);
pl061_gpio_register(GPIO23_BASE, 23);
pl061_gpio_register(GPIO24_BASE, 24);
pl061_gpio_register(GPIO25_BASE, 25);
pl061_gpio_register(GPIO26_BASE, 26);
pl061_gpio_register(GPIO27_BASE, 27);
pl061_gpio_register(GPIO28_BASE, 28);
/* PCIE_PERST_N output low */
gpio_set_direction(89, GPIO_DIR_OUT);

10
plat/hisilicon/hikey960/hikey960_pm.c
View File

@ -11,6 +11,7 @@
#include <drivers/arm/cci.h>
#include <drivers/arm/gicv2.h>
#include <drivers/arm/pl011.h>
#include <drivers/arm/pl061_gpio.h>
#include <drivers/delay_timer.h>
#include <lib/mmio.h>
#include <lib/psci/psci.h>
@ -116,6 +117,13 @@ void hikey960_pwr_domain_off(const psci_power_state_t *target_state)
}
}
static void __dead2 hikey960_system_off(void)
{
gpio_set_direction(176, GPIO_DIR_OUT);
gpio_set_value(176, GPIO_LEVEL_LOW);
panic();
}
static void __dead2 hikey960_system_reset(void)
{
dsb();
@ -293,7 +301,7 @@ static const plat_psci_ops_t hikey960_psci_ops = {
.pwr_domain_off = hikey960_pwr_domain_off,
.pwr_domain_suspend = hikey960_pwr_domain_suspend,
.pwr_domain_suspend_finish = hikey960_pwr_domain_suspend_finish,
.system_off = NULL,
.system_off = hikey960_system_off,
.system_reset = hikey960_system_reset,
.validate_power_state = hikey960_validate_power_state,
.validate_ns_entrypoint = hikey960_validate_ns_entrypoint,

7
plat/hisilicon/hikey960/include/hi3660.h
View File

@ -260,6 +260,13 @@
#define GPIO17_BASE UL(0xE8A1C000)
#define GPIO20_BASE UL(0xE8A1F000)
#define GPIO21_BASE UL(0xE8A20000)
#define GPIO22_BASE UL(0xFFF0B000)
#define GPIO23_BASE UL(0xFFF0C000)
#define GPIO24_BASE UL(0xFFF0D000)
#define GPIO25_BASE UL(0xFFF0E000)
#define GPIO26_BASE UL(0xFFF0F000)
#define GPIO27_BASE UL(0xFFF10000)
#define GPIO28_BASE UL(0xFFF1D000)
#define TZC_REG_BASE 0xE8A21000
#define TZC_STAT0_REG (TZC_REG_BASE + 0x800)

5
plat/hisilicon/hikey960/platform.mk
View File

@ -19,7 +19,7 @@ endif
CRASH_CONSOLE_BASE := PL011_UART6_BASE
COLD_BOOT_SINGLE_CPU := 1
PLAT_PL061_MAX_GPIOS := 176
PLAT_PL061_MAX_GPIOS := 232
PROGRAMMABLE_RESET_ADDRESS := 1
ENABLE_SVE_FOR_NS := 0
PLAT_PARTITION_BLOCK_SIZE := 4096
@ -95,12 +95,15 @@ BL2_SOURCES += lib/optee/optee_utils.c
endif
BL31_SOURCES += drivers/arm/cci/cci.c \
drivers/arm/pl061/pl061_gpio.c \
drivers/gpio/gpio.c \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a72.S \
lib/cpus/aarch64/cortex_a73.S \
plat/common/plat_psci_common.c \
plat/hisilicon/hikey960/aarch64/hikey960_helpers.S \
plat/hisilicon/hikey960/hikey960_bl31_setup.c \
plat/hisilicon/hikey960/hikey960_bl_common.c \
plat/hisilicon/hikey960/hikey960_pm.c \
plat/hisilicon/hikey960/hikey960_topology.c \
plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c \