From 2f6f7206a70dc979cca51d575cf8c08a60f61223 Mon Sep 17 00:00:00 2001 From: Varun Wadekar Date: Thu, 1 Sep 2016 14:56:17 -0700 Subject: [PATCH] Tegra210: set core power state during cluster power down This patch sets the core power state during cluster power down, so that the 'get_target_pwr_state' handler can calculate the proper states for all the affinity levels. Change-Id: If4adb001011208916427ee1623c6c923bed99985 Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/soc/t210/plat_psci_handlers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c index 95fb93fe0..26bf235e7 100644 --- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c @@ -76,7 +76,7 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state, * Cluster powerdown/idle request only for afflvl 1 */ req_state->pwr_domain_state[MPIDR_AFFLVL1] = state_id; - req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; + req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id; break;