fdts: stm32mp1: add support for Linux Automation MC-1 board

The Linux Automation MC-1 is a SBC built around the Octavo Systems
OSD32MP15x SiP. The SiP features up to 1 GB DDR3 RAM, EEPROM and
PMIC. The board has eMMC and a SD slot for storage.

The SDRAM calibration values are taken as is from the DKx boards, which
seem to be suitable for operation at German room temperature.

This is deemed ok for now, but for use in the field, the SiP will likely
need to have its timings determined in a climate chamber.

Change-Id: I5f43a61930151ae9d1df2ea7d0f6f9697c813ce0
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
This commit is contained in:
Ahmad Fatoum 2020-01-29 16:04:18 +01:00
parent 6047a10538
commit 2fbb60642f
2 changed files with 388 additions and 0 deletions

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/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
/*
* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
* Copyright (C) 2020 Ahmad Fatoum, Pengutronix
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
#include "stm32mp15xx-osd32.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
/ {
model = "Linux Automation MC-1 board";
compatible = "lxa,stm32mp157c-mc1", "oct,stm32mp15xx-osd32", "st,stm32mp157";
aliases {
mmc0 = &sdmmc1;
mmc1 = &sdmmc2;
serial0 = &uart4;
};
chosen {
stdout-path = &uart4;
};
led-act {
compatible = "gpio-leds";
led-green {
label = "mc1:green:act";
gpios = <&gpioa 13 1>;
linux,default-trigger = "heartbeat";
};
};
reg_3v3: regulator_3v3 {
compatible = "regulator-fixed";
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&v3v3>;
};
};
&sdmmc1 {
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
bus-width = <4>;
cd-gpios = <&gpioh 3 1>;
disable-wp;
no-1-8-v;
st,neg-edge;
vmmc-supply = <&reg_3v3>;
status = "okay";
};
&sdmmc1_b4_pins_a {
/*
* board lacks external pull-ups on SDMMC lines. Class 10 SD refuses to
* work, thus enable internal pull-ups.
*/
pins1 {
/delete-property/ bias-disable;
bias-pull-up;
};
pins2 {
/delete-property/ bias-disable;
bias-pull-up;
};
};
&sdmmc2 {
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2_b4_pins_a &mc1_sdmmc2_d47_pins_b>;
bus-width = <8>;
no-1-8-v;
no-sd;
no-sdio;
non-removable;
st,neg-edge;
vmmc-supply = <&reg_3v3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
status = "okay";
};
&pinctrl {
mc1_sdmmc2_d47_pins_b: mc1-sdmmc2-d47-1 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
};
};

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fdts/stm32mp15xx-osd32.dtsi Normal file
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/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
/*
* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
* Copyright (C) 2020 Ahmad Fatoum, Pengutronix
*/
#include "stm32mp15-pinctrl.dtsi"
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;
clock-frequency = <400000>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
pmic: stpmic@33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
regulators {
compatible = "st,stpmic1-regulators";
ldo1-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd: buck3 {
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,mask-reset;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
v3v3: buck4 {
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-over-current-protection;
regulator-initial-mode = <0>;
};
v1v8_audio: ldo1 {
regulator-name = "v1v8_audio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
v3v3_hdmi: ldo2 {
regulator-name = "v3v3_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <750000>;
regulator-always-on;
regulator-over-current-protection;
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdda: ldo5 {
regulator-name = "vdda";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-boot-on;
};
v1v2_hdmi: ldo6 {
regulator-name = "v1v2_hdmi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
regulator-name = "bst_out";
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
regulator-active-discharge;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
regulator-active-discharge;
};
};
pmic_watchdog: watchdog {
compatible = "st,stpmic1-wdt";
status = "disabled";
};
};
};
&rng1 {
status = "okay";
};
/* ATF Specific */
#include <dt-bindings/clock/stm32mp1-clksrc.h>
/ {
aliases {
gpio0 = &gpioa;
gpio1 = &gpiob;
gpio2 = &gpioc;
gpio3 = &gpiod;
gpio4 = &gpioe;
gpio5 = &gpiof;
gpio6 = &gpiog;
gpio7 = &gpioh;
gpio8 = &gpioi;
gpio25 = &gpioz;
i2c3 = &i2c4;
};
};
&bsec {
board_id: board_id@ec {
reg = <0xec 0x4>;
st,non-secure-otp;
};
};
&clk_hse {
st,digbypass;
};
&cpu0{
cpu-supply = <&vddcore>;
};
&cpu1{
cpu-supply = <&vddcore>;
};
&hash1 {
status = "okay";
};
/* CLOCK init */
&rcc {
secure-status = "disabled";
st,clksrc = <
CLK_MPU_PLL1P
CLK_AXI_PLL2P
CLK_MCU_PLL3P
CLK_PLL12_HSE
CLK_PLL3_HSE
CLK_PLL4_HSE
CLK_RTC_LSE
CLK_MCO1_DISABLED
CLK_MCO2_DISABLED
>;
st,clkdiv = <
1 /*MPU*/
0 /*AXI*/
0 /*MCU*/
1 /*APB1*/
1 /*APB2*/
1 /*APB3*/
1 /*APB4*/
2 /*APB5*/
23 /*RTC*/
0 /*MCO1*/
0 /*MCO2*/
>;
st,pkcs = <
CLK_CKPER_HSE
CLK_FMC_ACLK
CLK_QSPI_ACLK
CLK_ETH_PLL4P
CLK_SDMMC12_PLL4P
CLK_DSI_DSIPLL
CLK_STGEN_HSE
CLK_USBPHY_HSE
CLK_SPI2S1_PLL3Q
CLK_SPI2S23_PLL3Q
CLK_SPI45_HSI
CLK_SPI6_HSI
CLK_I2C46_HSI
CLK_SDMMC3_PLL4P
CLK_USBO_USBPHY
CLK_ADC_CKPER
CLK_CEC_LSE
CLK_I2C12_HSI
CLK_I2C35_HSI
CLK_UART1_HSI
CLK_UART24_HSI
CLK_UART35_HSI
CLK_UART6_HSI
CLK_UART78_HSI
CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4R
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
CLK_SAI4_PLL3Q
CLK_RNG1_LSI
CLK_RNG2_LSI
CLK_LPTIM1_PCLK1
CLK_LPTIM23_PCLK3
CLK_LPTIM45_LSE
>;
/* VCO = 1300.0 MHz => P = 650 (CPU) */
pll1: st,pll@0 {
compatible = "st,stm32mp1-pll";
reg = <0>;
cfg = < 2 80 0 0 0 PQR(1,0,0) >;
frac = < 0x800 >;
};
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
pll2: st,pll@1 {
compatible = "st,stm32mp1-pll";
reg = <1>;
cfg = <2 65 1 0 0 PQR(1,1,1)>;
frac = <0x1400>;
};
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
compatible = "st,stm32mp1-pll";
reg = <2>;
cfg = <1 33 1 16 36 PQR(1,1,1)>;
frac = <0x1a04>;
};
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = <3 98 5 7 7 PQR(1,1,1)>;
};
};