rockchip: make uart baudrate configurable

A previous patch already allowed to configure the uart output from the
devicetree, but on Rockchip platforms we also have the issue of different
vendors using different baudrates for their uarts.

For example, rk3399 has a default baudrate of 115200 which is true for
ChromeOS-devices and boards from Theobroma-Systems, while all the boards
using the vendor boot chain actually use a baudrate of 1500000.

Similarly the newly added px30 has a default of said 1500000 but some
boards may want to use the more widely used 115200.

The devicetree stdout-path node already contains the desired baudrate,
so add simple code to parse it from there and override the default,
which stays unchanged.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I7412139c3df3073a1996eb508ec08642ec6af90d

plat/rockchip/common/bl31_plat_setup.c

@@ -70,7 +70,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 				       &console);
 #else
 	console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK,
-			       PLAT_RK_UART_BAUDRATE, &console);
+			       rockchip_get_uart_baudrate(), &console);
 #endif
 
 	VERBOSE("bl31_setup\n");

plat/rockchip/common/include/plat_private.h

@@ -139,6 +139,7 @@ extern uint32_t cpuson_flags[PLATFORM_CORE_COUNT];
 extern const mmap_region_t plat_rk_mmap[];
 
 uint32_t rockchip_get_uart_base(void);
+uint32_t rockchip_get_uart_baudrate(void);
 
 #endif /* __ASSEMBLY__ */
 

plat/rockchip/common/params_setup.c

@@ -27,12 +27,18 @@ static struct bl_aux_gpio_info suspend_gpio[10];
 uint32_t suspend_gpio_cnt;
 static struct bl_aux_rk_apio_info suspend_apio;
 static uint32_t rk_uart_base = PLAT_RK_UART_BASE;
+static uint32_t rk_uart_baudrate = PLAT_RK_UART_BAUDRATE;
 
 uint32_t rockchip_get_uart_base(void)
 {
 	return rk_uart_base;
 }
 
+uint32_t rockchip_get_uart_baudrate(void)
+{
+	return rk_uart_baudrate;
+}
+
 #if COREBOOT
 static int dt_process_fdt(u_register_t param_from_bl2)
 {
@@ -53,9 +59,12 @@ static void plat_rockchip_dt_process_fdt_uart(void *fdt)
 	int node_offset;
 	int stdout_path_len;
 	const char *stdout_path;
+	const char *separator;
+	const char *baud_start;
 	char serial_char;
 	int serial_no;
 	uint32_t uart_base;
+	uint32_t baud;
 
 	node_offset = fdt_path_offset(fdt, path_name);
 	if (node_offset < 0)
@@ -68,7 +77,7 @@ static void plat_rockchip_dt_process_fdt_uart(void *fdt)
 
 	/*
 	 * We expect something like:
-	 *   "serial0:...""
+	 *   "serial0:baudrate"
 	 */
 	if (strncmp("serial", stdout_path, 6) != 0)
 		return;
@@ -106,6 +115,28 @@ static void plat_rockchip_dt_process_fdt_uart(void *fdt)
 	}
 
 	rk_uart_base = uart_base;
+
+	separator = strchr(stdout_path, ':');
+	if (!separator)
+		return;
+
+	baud = 0;
+	baud_start = separator + 1;
+	while (*baud_start != '\0') {
+		/*
+		 * uart binding is <baud>{<parity>{<bits>{...}}}
+		 * So the baudrate either is the whole string, or
+		 * we end in the parity characters.
+		 */
+		if (*baud_start == 'n' || *baud_start == 'o' ||
+		    *baud_start == 'e')
+			break;
+
+		baud = baud * 10 + (*baud_start - '0');
+		baud_start++;
+	}
+
+	rk_uart_baudrate = baud;
 }
 
 static int dt_process_fdt(u_register_t param_from_bl2)

plat/rockchip/common/sp_min_plat_setup.c

@@ -65,7 +65,7 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 				       &console);
 #else
 	console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK,
-			       PLAT_RK_UART_BAUDRATE, &console);
+			       rockchip_get_uart_baudrate(), &console);
 #endif
 	VERBOSE("sp_min_setup\n");