Makefile: don't use $(CC) before value is explicit set
Unless specified in the environment, $(CC) expands to some generic
host C compiler like cc or c99. We set our own value for $(CC), but
only few lines later.
Move the first use of the $(CC) variable behind the definition to
correct this.
Change-Id: I45344e063d21ddfe22b7ad77954e85c1c46087bd
Fixes: 1684b8733
("Use clang assembler when clang compiler is used")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
This commit is contained in:
parent
27c5e15ee4
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40
Makefile
40
Makefile
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@ -84,26 +84,6 @@ endif
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export Q ECHO
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export Q ECHO
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# Process Debug flag
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$(eval $(call add_define,DEBUG))
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ifneq (${DEBUG}, 0)
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BUILD_TYPE := debug
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TF_CFLAGS += -g
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ifneq ($(findstring clang,$(notdir $(CC))),)
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ASFLAGS += -g
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else
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ASFLAGS += -g -Wa,--gdwarf-2
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endif
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# Use LOG_LEVEL_INFO by default for debug builds
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LOG_LEVEL := 40
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else
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BUILD_TYPE := release
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# Use LOG_LEVEL_NOTICE by default for release builds
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LOG_LEVEL := 20
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endif
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# Default build string (git branch and commit)
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# Default build string (git branch and commit)
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ifeq (${BUILD_STRING},)
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ifeq (${BUILD_STRING},)
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BUILD_STRING := $(shell git describe --always --dirty --tags 2> /dev/null)
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BUILD_STRING := $(shell git describe --always --dirty --tags 2> /dev/null)
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@ -243,6 +223,26 @@ TF_CFLAGS_aarch64 = $(march64-directive)
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LD = $(LINKER)
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LD = $(LINKER)
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endif
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endif
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# Process Debug flag
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$(eval $(call add_define,DEBUG))
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ifneq (${DEBUG}, 0)
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BUILD_TYPE := debug
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TF_CFLAGS += -g
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ifneq ($(findstring clang,$(notdir $(CC))),)
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ASFLAGS += -g
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else
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ASFLAGS += -g -Wa,--gdwarf-2
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endif
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# Use LOG_LEVEL_INFO by default for debug builds
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LOG_LEVEL := 40
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else
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BUILD_TYPE := release
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# Use LOG_LEVEL_NOTICE by default for release builds
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LOG_LEVEL := 20
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endif
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ifeq (${AARCH32_INSTRUCTION_SET},A32)
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ifeq (${AARCH32_INSTRUCTION_SET},A32)
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TF_CFLAGS_aarch32 += -marm
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TF_CFLAGS_aarch32 += -marm
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else ifeq (${AARCH32_INSTRUCTION_SET},T32)
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else ifeq (${AARCH32_INSTRUCTION_SET},T32)
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