ddr: a80x0: add DDR 32-bit ECC mode support
Change a topology map from internal database to SPD based for 32bit bus width mode Change-Id: I803166893ddc2fd916fc8a1c27fffd34b6ec0c72 Signed-off-by: Alex Leibovich <alexl@marvell.com>
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@ -54,11 +54,10 @@ static struct mv_ddr_topology_map board_topology_map = {
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MV_DDR_TEMP_LOW} }, /* temperature */
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MV_DDR_TEMP_LOW} }, /* temperature */
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#if DDR32
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#if DDR32
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MV_DDR_32BIT_ECC_PUP8_BUS_MASK, /* subphys mask */
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MV_DDR_32BIT_ECC_PUP8_BUS_MASK, /* subphys mask */
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MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
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#else
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#else
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MV_DDR_64BIT_ECC_PUP8_BUS_MASK, /* subphys mask */
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MV_DDR_64BIT_ECC_PUP8_BUS_MASK, /* subphys mask */
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MV_DDR_CFG_SPD, /* ddr configuration data source */
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#endif
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#endif
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MV_DDR_CFG_SPD, /* ddr configuration data source */
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{ {0} }, /* raw spd data */
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{ {0} }, /* raw spd data */
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{0}, /* timing parameters */
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{0}, /* timing parameters */
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{ /* electrical configuration */
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{ /* electrical configuration */
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