errata: workaround for Neoverse V1 errata 1791573

Neoverse V1 erratum 1791573 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ic6f92da4d0b995bd04ca5b1673ffeedaebb71d10
This commit is contained in:
johpow01 2021-05-03 15:33:39 -05:00
parent 41e893fff4
commit 33e3e92541
4 changed files with 67 additions and 2 deletions

View File

@ -323,6 +323,12 @@ For Neoverse N1, the following errata build flags are defined :
CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for
revisions r0p0, r1p0, and r2p0 there is no workaround.
For Neoverse V1, the following errata build flags are defined :
- ``ERRATA_V1_1791573``: This applies errata 1791573 workaround to Neoverse-V1
CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
in r1p1.
DSU Errata Workarounds
----------------------

View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, ARM Limited. All rights reserved.
* Copyright (c) 2019-2021, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -20,4 +20,10 @@
#define NEOVERSE_V1_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define NEOVERSE_V1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
/*******************************************************************************
* CPU Auxiliary Control register specific definitions.
******************************************************************************/
#define NEOVERSE_V1_ACTLR2_EL1 S3_0_C15_C1_1
#define NEOVERSE_V1_ACTLR2_EL1_BIT_2 (ULL(1) << 2)
#endif /* NEOVERSE_V1_H */

View File

@ -21,6 +21,34 @@
#error "Neoverse-V1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#endif
/* --------------------------------------------------
* Errata Workaround for Neoverse V1 Errata #1791573.
* This applies to revisions r0p0 and r1p0, fixed in r1p1.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_neoverse_v1_1791573_wa
/* Check workaround compatibility. */
mov x17, x30
bl check_errata_1791573
cbz x0, 1f
/* Set bit 2 in ACTLR2_EL1 */
mrs x1, NEOVERSE_V1_ACTLR2_EL1
orr x1, x1, #NEOVERSE_V1_ACTLR2_EL1_BIT_2
msr NEOVERSE_V1_ACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_neoverse_v1_1791573_wa
func check_errata_1791573
/* Applies to r0p0 and r1p0. */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_1791573
/* ---------------------------------------------
* HW will do the cache maintenance while powering down
* ---------------------------------------------
@ -42,6 +70,18 @@ endfunc neoverse_v1_core_pwr_dwn
*/
#if REPORT_ERRATA
func neoverse_v1_errata_report
stp x8, x30, [sp, #-16]!
bl cpu_get_rev_var
mov x8, x0
/*
* Report all errata. The revision-variant information is passed to
* checking functions of each errata.
*/
report_errata ERRATA_V1_1791573, neoverse_v1, 1791573
ldp x8, x30, [sp], #16
ret
endfunc neoverse_v1_errata_report
#endif
@ -51,8 +91,13 @@ func neoverse_v1_reset_func
/* Disable speculative loads */
msr SSBS, xzr
isb
#if ERRATA_V1_1791573
mov x0, x18
bl errata_neoverse_v1_1791573_wa
#endif
ret x19
endfunc neoverse_v1_reset_func

View File

@ -372,6 +372,10 @@ ERRATA_N1_1868343 ?=0
# exists in revisions r0p0, r1p0, and r2p0 as well but there is no workaround.
ERRATA_N1_1946160 ?=0
# Flag to apply erratum 1791573 workaround during reset. This erratum applies
# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
ERRATA_V1_1791573 ?=0
# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
# Applying the workaround results in higher DSU power consumption on idle.
ERRATA_DSU_798953 ?=0
@ -677,6 +681,10 @@ $(eval $(call add_define,ERRATA_N1_1868343))
$(eval $(call assert_boolean,ERRATA_N1_1946160))
$(eval $(call add_define,ERRATA_N1_1946160))
# Process ERRATA_V1_1791573 flag
$(eval $(call assert_boolean,ERRATA_V1_1791573))
$(eval $(call add_define,ERRATA_V1_1791573))
# Process ERRATA_DSU_798953 flag
$(eval $(call assert_boolean,ERRATA_DSU_798953))
$(eval $(call add_define,ERRATA_DSU_798953))