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amlogic: Move the SIP SVC code to common directory 

The code is the same between GXBB and GXL. Move it to the common source
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I875689a6fd029971aa755fc2725217e90ed06b6c
This commit is contained in:
Carlo Caione 2019-08-24 17:52:40 +01:00
parent 261e7fd7b6
commit 35aee24ef5
4 changed files with 3 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
plat/amlogic/gxl/gxl_sip_svc.c → plat/amlogic/common/aml_sip_svc.c
View File

@ -5,9 +5,9 @@
*/
#include <common/debug.h>
#include <common/runtime_svc.h>
#include <lib/mmio.h>
#include <platform_def.h>
#include <common/runtime_svc.h>
#include <stdint.h>
#include "aml_private.h"

68
plat/amlogic/gxbb/gxbb_sip_svc.c
View File

@ -1,68 +0,0 @@
/*
* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include <platform_def.h>
#include <common/debug.h>
#include <common/runtime_svc.h>
#include <lib/mmio.h>
#include "aml_private.h"
/*******************************************************************************
* This function is responsible for handling all SiP calls
******************************************************************************/
static uintptr_t gxbb_sip_handler(uint32_t smc_fid,
u_register_t x1, u_register_t x2,
u_register_t x3, u_register_t x4,
void *cookie, void *handle,
u_register_t flags)
{
switch (smc_fid) {
case GXBB_SM_GET_SHARE_MEM_INPUT_BASE:
SMC_RET1(handle, GXBB_SHARE_MEM_INPUT_BASE);
case GXBB_SM_GET_SHARE_MEM_OUTPUT_BASE:
SMC_RET1(handle, GXBB_SHARE_MEM_OUTPUT_BASE);
case GXBB_SM_EFUSE_READ:
{
void *dst = (void *)GXBB_SHARE_MEM_OUTPUT_BASE;
uint64_t ret = gxbb_efuse_read(dst, (uint32_t)x1, x2);
SMC_RET1(handle, ret);
}
case GXBB_SM_EFUSE_USER_MAX:
SMC_RET1(handle, gxbb_efuse_user_max());
case GXBB_SM_JTAG_ON:
scpi_jtag_set_state(GXBB_JTAG_STATE_ON, x1);
SMC_RET1(handle, 0);
case GXBB_SM_JTAG_OFF:
scpi_jtag_set_state(GXBB_JTAG_STATE_OFF, x1);
SMC_RET1(handle, 0);
default:
ERROR("BL31: Unhandled SIP SMC: 0x%08x\n", smc_fid);
break;
}
SMC_RET1(handle, SMC_UNK);
}
DECLARE_RT_SVC(
gxbb_sip_handler,
OEN_SIP_START,
OEN_SIP_END,
SMC_TYPE_FAST,
NULL,
gxbb_sip_handler
);

2
plat/amlogic/gxbb/platform.mk
View File

@ -32,7 +32,7 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
${AML_PLAT_COMMON}/aml_mhu.c \
${AML_PLAT_SOC}/gxbb_pm.c \
${AML_PLAT_COMMON}/aml_scpi.c \
${AML_PLAT_SOC}/gxbb_sip_svc.c \
${AML_PLAT_COMMON}/aml_sip_svc.c \
${AML_PLAT_COMMON}/aml_thermal.c \
${GIC_SOURCES}

2
plat/amlogic/gxl/platform.mk
View File

@ -35,7 +35,7 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
${AML_PLAT_COMMON}/aml_mhu.c \
${AML_PLAT_SOC}/gxl_pm.c \
${AML_PLAT_COMMON}/aml_scpi.c \
${AML_PLAT_SOC}/gxl_sip_svc.c \
${AML_PLAT_COMMON}/aml_sip_svc.c \
${AML_PLAT_COMMON}/aml_thermal.c \
drivers/amlogic/crypto/sha_dma.c \
${GIC_SOURCES}