arm: Shorten the Firmware Update (FWU) process

The watchdog is configured with a default value of 256 seconds in order
to implement the Trusted Board Boot Requirements.

For the FVP and Juno platforms, the FWU process relies on a watchdog
reset. In order to automate the test of FWU, the length of this process
needs to be as short as possible. Instead of waiting for those 4 minutes
to have a reset by the watchdog, tell it to reset immediately.

There are no side effects as the value of the watchdog's load register
resets to 0xFFFFFFFF.

Tested on Juno.

Change-Id: Ib1aea80ceddc18ff1e0813a5b98dd141ba8a3ff2
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
This commit is contained in:
Ambroise Vincent 2019-07-04 14:58:45 +01:00
parent b514ee86c4
commit 37b70031e0
20 changed files with 192 additions and 51 deletions

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@ -252,7 +252,7 @@ void plat_arm_interconnect_enter_coherency(void);
void plat_arm_interconnect_exit_coherency(void);
void plat_arm_program_trusted_mailbox(uintptr_t address);
int plat_arm_bl1_fwu_needed(void);
void plat_arm_error_handler(int err);
__dead2 void plat_arm_error_handler(int err);
#if ARM_PLAT_MT
unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat/arm/common/plat_arm.h>
/*
* a5ds error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
while (1) {
wfi();
}
}

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@ -36,6 +36,7 @@ BL1_SOURCES += drivers/io/io_fip.c \
drivers/cfi/v2m/v2m_flash.c \
plat/arm/common/arm_bl1_setup.c \
plat/arm/common/arm_err.c \
plat/arm/board/a5ds/a5ds_err.c \
plat/arm/common/arm_io_storage.c \
plat/arm/board/a5ds/${ARCH}/a5ds_helpers.S \
plat/arm/board/a5ds/a5ds_bl1_setup.c \
@ -55,6 +56,7 @@ BL2_SOURCES += lib/aarch32/arm32_aeabi_divmod.c \
plat/arm/board/a5ds/a5ds_bl2_setup.c \
plat/arm/common/arm_bl2_setup.c \
plat/arm/common/arm_err.c \
plat/arm/board/a5ds/a5ds_err.c \
plat/arm/common/arm_io_storage.c \
plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \
plat/arm/common/arm_image_load.c \

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@ -52,3 +52,12 @@ void bl1_platform_setup(void)
if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
smmuv3_security_init(PLAT_FVP_SMMUV3_BASE);
}
__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
{
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
while (1)
wfi();
}

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@ -0,0 +1,48 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <errno.h>
#include <common/debug.h>
#include <drivers/arm/sp805.h>
#include <drivers/cfi/v2m_flash.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
#include <platform_def.h>
/*
* FVP error handler
*/
__dead2 void plat_arm_error_handler(int err)
{
int ret;
switch (err) {
case -ENOENT:
case -EAUTH:
/* Image load or authentication error. Erase the ToC */
INFO("Erasing FIP ToC from flash...\n");
(void)nor_unlock(PLAT_ARM_FIP_BASE);
ret = nor_word_program(PLAT_ARM_FIP_BASE, 0);
if (ret != 0) {
ERROR("Cannot erase ToC\n");
} else {
INFO("Done\n");
}
break;
default:
/* Unexpected error */
break;
}
(void)console_flush();
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
for (;;)
wfi();
}

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@ -131,17 +131,20 @@ BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
lib/semihosting/${ARCH}/semihosting_call.S \
plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
plat/arm/board/fvp/fvp_bl1_setup.c \
plat/arm/board/fvp/fvp_err.c \
plat/arm/board/fvp/fvp_io_storage.c \
plat/arm/board/fvp/fvp_trusted_boot.c \
${FVP_CPU_LIBS} \
${FVP_INTERCONNECT_SOURCES}
BL2_SOURCES += drivers/io/io_semihosting.c \
BL2_SOURCES += drivers/arm/sp805/sp805.c \
drivers/io/io_semihosting.c \
lib/utils/mem_region.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
plat/arm/board/fvp/fvp_bl2_setup.c \
plat/arm/board/fvp/fvp_err.c \
plat/arm/board/fvp/fvp_io_storage.c \
plat/arm/board/fvp/fvp_trusted_boot.c \
plat/arm/common/arm_nor_psci_mem_protect.c \

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat/arm/common/plat_arm.h>
/*
* FVP VE error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
while (1) {
wfi();
}
}

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@ -40,6 +40,7 @@ BL1_SOURCES += drivers/arm/sp805/sp805.c \
drivers/io/io_storage.c \
plat/arm/common/arm_bl1_setup.c \
plat/arm/common/arm_err.c \
plat/arm/board/fvp_ve/fvp_ve_err.c \
plat/arm/common/arm_io_storage.c \
drivers/cfi/v2m/v2m_flash.c \
plat/arm/board/fvp_ve/${ARCH}/fvp_ve_helpers.S \
@ -60,6 +61,7 @@ BL2_SOURCES += plat/arm/board/fvp_ve/fvp_ve_bl2_setup.c \
drivers/io/io_storage.c \
plat/arm/common/arm_bl2_setup.c \
plat/arm/common/arm_err.c \
plat/arm/board/fvp_ve/fvp_ve_err.c \
plat/arm/common/arm_io_storage.c \
plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \
plat/arm/common/arm_image_load.c \

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@ -98,6 +98,9 @@ __dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
/* Clear the NV flags register. */
*nv_flags_clr = *nv_flags_ptr;
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
while (1)
wfi();
}

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@ -7,6 +7,7 @@
#include <errno.h>
#include <arch_helpers.h>
#include <drivers/arm/sp805.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
#include <platform_def.h>
@ -21,7 +22,9 @@ void __dead2 plat_arm_error_handler(int err)
/* Propagate the err code in the NV-flags register */
*flags_ptr = err;
/* Loop until the watchdog resets the system */
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
for (;;)
wfi();
}

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@ -66,7 +66,8 @@ BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
${JUNO_INTERCONNECT_SOURCES} \
${JUNO_SECURITY_SOURCES}
BL2_SOURCES += lib/utils/mem_region.c \
BL2_SOURCES += drivers/arm/sp805/sp805.c \
lib/utils/mem_region.c \
plat/arm/board/juno/juno_err.c \
plat/arm/board/juno/juno_bl2_setup.c \
plat/arm/common/arm_nor_psci_mem_protect.c \

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@ -12,10 +12,12 @@ PLAT_INCLUDES += -I${RDE1EDGE_BASE}/include/
SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_e1.S
BL1_SOURCES += ${SGI_CPU_SOURCES}
BL1_SOURCES += ${SGI_CPU_SOURCES} \
${RDE1EDGE_BASE}/rde1edge_err.c
BL2_SOURCES += ${RDE1EDGE_BASE}/rde1edge_plat.c \
${RDE1EDGE_BASE}/rde1edge_security.c \
${RDE1EDGE_BASE}/rde1edge_err.c \
drivers/arm/tzc/tzc_dmc620.c \
lib/utils/mem_region.c \
plat/arm/common/arm_nor_psci_mem_protect.c

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat/arm/common/plat_arm.h>
/*
* rde1edge error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
while (1) {
wfi();
}
}

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@ -12,10 +12,12 @@ PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
BL1_SOURCES += ${SGI_CPU_SOURCES}
BL1_SOURCES += ${SGI_CPU_SOURCES} \
${RDN1EDGE_BASE}/rdn1edge_err.c
BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
${RDN1EDGE_BASE}/rdn1edge_security.c \
${RDN1EDGE_BASE}/rdn1edge_err.c \
drivers/arm/tzc/tzc_dmc620.c \
lib/utils/mem_region.c \
plat/arm/common/arm_nor_psci_mem_protect.c

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat/arm/common/plat_arm.h>
/*
* rdn1edge error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
while (1) {
wfi();
}
}

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@ -1,5 +1,5 @@
#
# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -12,10 +12,12 @@ PLAT_INCLUDES += -I${SGI575_BASE}/include/
SGI_CPU_SOURCES := lib/cpus/aarch64/cortex_a75.S
BL1_SOURCES += ${SGI_CPU_SOURCES}
BL1_SOURCES += ${SGI_CPU_SOURCES} \
${SGI575_BASE}/sgi575_err.c
BL2_SOURCES += ${SGI575_BASE}/sgi575_plat.c \
${SGI575_BASE}/sgi575_security.c \
${SGI575_BASE}/sgi575_err.c \
drivers/arm/tzc/tzc_dmc620.c \
lib/utils/mem_region.c \
plat/arm/common/arm_nor_psci_mem_protect.c

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat/arm/common/plat_arm.h>
/*
* sgi575 error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
while (1) {
wfi();
}
}

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@ -1,5 +1,5 @@
#
# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -12,7 +12,10 @@ FDT_SOURCES += ${SGM775_BASE}/fdts/sgm775_tb_fw_config.dts
PLAT_INCLUDES +=-I${SGM775_BASE}/include/
BL1_SOURCES += ${SGM775_BASE}/sgm775_err.c
BL2_SOURCES += lib/utils/mem_region.c \
${SGM775_BASE}/sgm775_err.c \
plat/arm/common/arm_nor_psci_mem_protect.c
BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \

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@ -0,0 +1,17 @@
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <plat/arm/common/plat_arm.h>
/*
* sgm775 error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
while (1) {
wfi();
}
}

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@ -1,55 +1,14 @@
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <errno.h>
#include <stdint.h>
#include <platform_def.h>
#include <arch_helpers.h>
#include <common/debug.h>
#include <drivers/cfi/v2m_flash.h>
#include <drivers/console.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
#pragma weak plat_arm_error_handler
/*
* ARM common implementation for error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
int ret;
switch (err) {
case -ENOENT:
case -EAUTH:
/* Image load or authentication error. Erase the ToC */
INFO("Erasing FIP ToC from flash...\n");
(void)nor_unlock(PLAT_ARM_FIP_BASE);
ret = nor_word_program(PLAT_ARM_FIP_BASE, 0);
if (ret != 0) {
ERROR("Cannot erase ToC\n");
} else {
INFO("Done\n");
}
break;
default:
/* Unexpected error */
break;
}
(void)console_flush();
/* Loop until the watchdog resets the system */
for (;;)
wfi();
}
void __dead2 plat_error_handler(int err)
{
plat_arm_error_handler(err);