Juno: Read primary CPU MPID from SCC GPR_1
This patch removes the PRIMARY_CPU definition hardcoded in the Juno port. Instead, the primary CPU is obtained at runtime by reading the SCC General Purpose Register 1 (GPR_1), whose value is copied by the SCP into shared memory during the boot process. Change-Id: I3981daa92eb7142250712274cf7f655b219837f5
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@ -32,10 +32,27 @@
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#include <asm_macros.S>
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#include <asm_macros.S>
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#include "../juno_def.h"
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#include "../juno_def.h"
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.globl platform_is_primary_cpu
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.globl platform_get_entrypoint
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.globl platform_get_entrypoint
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.globl platform_cold_boot_init
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.globl platform_cold_boot_init
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.globl plat_secondary_cold_boot_setup
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.globl plat_secondary_cold_boot_setup
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/* -----------------------------------------------------
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* unsigned int platform_is_primary_cpu (unsigned int mpid);
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*
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* Given the mpidr say whether this cpu is the primary
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* cpu (applicable ony after a cold boot)
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* -----------------------------------------------------
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*/
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func platform_is_primary_cpu
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mov x9, x30
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bl platform_get_core_pos
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ldr x1, =SCP_BOOT_CFG_ADDR
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ldr x1, [x1]
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ubfx x1, x1, #PRIMARY_CPU_SHIFT, #PRIMARY_CPU_MASK
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cmp x0, x1
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cset x0, eq
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ret x9
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/* -----------------------------------------------------
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/* -----------------------------------------------------
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* void plat_secondary_cold_boot_setup (void);
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* void plat_secondary_cold_boot_setup (void);
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@ -41,7 +41,6 @@
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.globl plat_report_exception
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.globl plat_report_exception
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.globl plat_reset_handler
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.globl plat_reset_handler
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.globl platform_get_core_pos
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.globl platform_get_core_pos
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.globl platform_is_primary_cpu
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.globl platform_mem_init
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.globl platform_mem_init
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/* Define a crash console for the plaform */
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/* Define a crash console for the plaform */
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@ -103,21 +102,6 @@ func platform_get_core_pos
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ret
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ret
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/* -----------------------------------------------------
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* unsigned int platform_is_primary_cpu(unsigned long mpid);
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*
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* Given the mpidr say whether this cpu is the primary
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* cpu (applicable only after a cold boot)
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* -----------------------------------------------------
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*/
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func platform_is_primary_cpu
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/* Juno todo: allow configuration of primary CPU using SCC */
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #JUNO_PRIMARY_CPU
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cset x0, eq
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ret
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/* -----------------------------------------------------
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/* -----------------------------------------------------
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* void platform_mem_init(void);
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* void platform_mem_init(void);
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*
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*
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@ -128,7 +128,7 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
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PARAM_EP, VERSION_1, 0);
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PARAM_EP, VERSION_1, 0);
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/* BL3-3 expects to receive the primary CPU MPID (through x0) */
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/* BL3-3 expects to receive the primary CPU MPID (through x0) */
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bl2_to_bl31_params->bl33_ep_info->args.arg0 = JUNO_PRIMARY_CPU;
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bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
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bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
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bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
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SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY,
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SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY,
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@ -34,8 +34,6 @@
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/* Special value used to verify platform parameters from BL2 to BL3-1 */
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/* Special value used to verify platform parameters from BL2 to BL3-1 */
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#define JUNO_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
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#define JUNO_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
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#define JUNO_PRIMARY_CPU 0x100
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/*******************************************************************************
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/*******************************************************************************
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* Juno memory map related constants
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* Juno memory map related constants
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******************************************************************************/
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******************************************************************************/
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@ -194,4 +192,11 @@
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#define CCI400_SL_IFACE3_CLUSTER_IX 1
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#define CCI400_SL_IFACE3_CLUSTER_IX 1
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#define CCI400_SL_IFACE4_CLUSTER_IX 0
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#define CCI400_SL_IFACE4_CLUSTER_IX 0
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/*******************************************************************************
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* SCP <=> AP boot configuration
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******************************************************************************/
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#define SCP_BOOT_CFG_ADDR 0x04000080
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#define PRIMARY_CPU_SHIFT 8
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#define PRIMARY_CPU_MASK 0xf
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#endif /* __JUNO_DEF_H__ */
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#endif /* __JUNO_DEF_H__ */
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