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Merge "fix(xilinx): fix coding style violations" into integration

This commit is contained in:
Madhukar Pappireddy 2022-03-16 15:41:31 +01:00 committed by TrustedFirmware Code Review
parent e58eb9d103 bb1768c67e
commit 38dd6b61ae
7 changed files with 24 additions and 33 deletions
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3
plat/xilinx/common/pm_service/pm_ipi.c
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@ -6,10 +6,8 @@
#include <arch_helpers.h>
#include <lib/bakery_lock.h>
#include <lib/mmio.h>
#include <ipi.h>
#include <plat_ipi.h>
#include <plat_private.h>
@ -17,7 +15,6 @@
#include "pm_ipi.h"
#define ERROR_CODE_MASK 0xFFFFU
DEFINE_BAKERY_LOCK(pm_secure_lock);

1
plat/xilinx/versal/pm_service/pm_client.c
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@ -136,6 +136,7 @@ static void pm_client_set_wakeup_sources(uint32_t node_id)
enum pm_device_node_idx node_idx;
uint32_t idx, irq, lowest_set = reg & (-reg);
enum pm_ret_status ret;
idx = __builtin_ctz(lowest_set);
irq = base_irq + idx;

4
plat/xilinx/zynqmp/platform.mk
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@ -45,11 +45,11 @@ endif
ifdef ZYNQMP_WDT_RESTART
$(eval $(call add_define,ZYNQMP_WDT_RESTART))
$(eval $(call add_define,ZYNQMP_WDT_RESTART))
endif
ifdef ZYNQMP_IPI_CRC_CHECK
$(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
$(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
endif
ifdef IPI_CRC_CHECK

13
plat/xilinx/zynqmp/pm_service/pm_api_sys.h
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@ -175,7 +175,6 @@ enum pm_ret_status pm_secure_image(uint32_t address_low,
uint32_t key_lo,
uint32_t key_hi,
uint32_t *value);
enum pm_ret_status pm_fpga_read(uint32_t reg_numframes,
uint32_t address_low,
uint32_t address_high,
@ -189,15 +188,12 @@ enum pm_ret_status pm_register_access(unsigned int register_access_id,
unsigned int mask,
unsigned int value,
unsigned int *out);
enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid,
enum pm_pll_param param_id,
unsigned int value);
enum pm_pll_param param_id,
unsigned int value);
enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid,
enum pm_pll_param param_id,
unsigned int *value);
enum pm_pll_param param_id,
unsigned int *value);
enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode);
enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode);
enum pm_ret_status pm_efuse_access(uint32_t address_high,
@ -205,7 +201,6 @@ enum pm_ret_status pm_efuse_access(uint32_t address_high,
enum pm_ret_status em_set_action(unsigned int *value);
enum pm_ret_status em_remove_action(unsigned int *value);
enum pm_ret_status em_send_errors(unsigned int *value);
enum pm_ret_status pm_feature_config(unsigned int ioctl_id,
unsigned int config_id,
unsigned int value,

30
plat/xilinx/zynqmp/pm_service/pm_defs.h
View File

@ -303,16 +303,16 @@ enum pm_shutdown_subtype {
};
/**
* @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL
* @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL
* @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL
* @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input
* @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode
* @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize
* @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting
* @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control
* @PM_PLL_PARAM_CP: PLL charge pump control
* @PM_PLL_PARAM_RES: PLL loop filter resistor control
* @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL
* @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL
* @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL
* @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input
* @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode
* @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize
* @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting
* @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control
* @PM_PLL_PARAM_CP: PLL charge pump control
* @PM_PLL_PARAM_RES: PLL loop filter resistor control
*/
enum pm_pll_param {
PM_PLL_PARAM_DIV2,
@ -329,9 +329,9 @@ enum pm_pll_param {
};
/**
* @PM_PLL_MODE_RESET: PLL is in reset (not locked)
* @PM_PLL_MODE_INTEGER: PLL is locked in integer mode
* @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode
* @PM_PLL_MODE_RESET: PLL is in reset (not locked)
* @PM_PLL_MODE_INTEGER: PLL is locked in integer mode
* @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode
*/
enum pm_pll_mode {
PM_PLL_MODE_RESET,
@ -341,8 +341,8 @@ enum pm_pll_mode {
};
/**
* @PM_CLOCK_DIV0_ID: Clock divider 0
* @PM_CLOCK_DIV1_ID: Clock divider 1
* @PM_CLOCK_DIV0_ID: Clock divider 0
* @PM_CLOCK_DIV1_ID: Clock divider 1
*/
enum pm_clock_div_id {
PM_CLOCK_DIV0_ID,

5
plat/xilinx/zynqmp/pm_service/pm_svc_main.c
View File

@ -34,7 +34,6 @@ static spinlock_t inc_lock;
static int active_cores = 0;
#endif
/**
* pm_context - Structure which contains data for power management
* @api_version version of PM API, must match with one on PMU side
@ -103,7 +102,7 @@ static void trigger_wdt_restart(void)
* action.
*/
static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle,
void *cookie)
void *cookie)
{
INFO("BL31: Got TTC FIQ\n");
@ -136,7 +135,7 @@ static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle,
* running CPU calls system restart.
*/
static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags,
void *handle, void *cookie)
void *handle, void *cookie)
{
int i;
uint32_t value;

1
plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
View File

@ -8,7 +8,6 @@
#include <common/debug.h>
#include <drivers/console.h>
#include <plat/arm/common/plat_arm.h>
#include <plat_private.h>
#include <platform_tsp.h>