diff --git a/fdts/tc0.dts b/fdts/tc0.dts index 763c813cf..2a1c1cd3d 100644 --- a/fdts/tc0.dts +++ b/fdts/tc0.dts @@ -370,4 +370,17 @@ }; }; }; + + ffa { + compatible = "arm,ffa"; + conduit = "smc"; + mem_share_buffer = "tx"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "ffa"; + }; + }; }; diff --git a/plat/arm/board/tc0/fdts/tc0_spmc_optee_sp_manifest.dts b/plat/arm/board/tc0/fdts/tc0_spmc_optee_sp_manifest.dts new file mode 100644 index 000000000..a58b9113e --- /dev/null +++ b/plat/arm/board/tc0/fdts/tc0_spmc_optee_sp_manifest.dts @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2020, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +/dts-v1/; + +#define AFF 00 + +#include "fvp-defs.dtsi" +#undef POST +#define POST \ + }; + +/ { + compatible = "arm,ffa-core-manifest-1.0"; + #address-cells = <2>; + #size-cells = <1>; + + attribute { + spmc_id = <0x8000>; + maj_ver = <0x1>; + min_ver = <0x0>; + exec_state = <0x0>; + load_address = <0x0 0xfd000000>; + entrypoint = <0x0 0xfd000000>; + binary_size = <0x80000>; + }; + + /* + * temporary: This entry is added based on v2.4 hafnium and will be + * removed when rebased to upstream master. + */ + chosen { + linux,initrd-start = <0>; + linux,initrd-end = <0>; + }; + + hypervisor { + compatible = "hafnium,hafnium"; + vm1 { + is_ffa_partition; + debug_name = "op-tee"; + load_address = <0xfd280000>; + }; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + CPU_0 + + /* + * SPMC (Hafnium) requires secondary core nodes are declared + * in descending order. + */ + CPU_3 + CPU_2 + CPU_1 + }; + + /* + * temporary: This device-memory region is added based on v2.4 hafnium + * and will be removed when rebased to upstream master. As first + * Secure Partition no longer maps device memory. + */ + device-memory@21000000 { + device_type = "device-memory"; + reg = <0x0 0x21000000 0x5f000000>; + }; + + /* 32MB of TC0_TZC_DRAM1_BASE */ + memory@fd000000 { + device_type = "memory"; + reg = <0x0 0xfd000000 0x2000000>; + }; +}; diff --git a/plat/arm/board/tc0/fdts/tc0_tb_fw_config.dts b/plat/arm/board/tc0/fdts/tc0_tb_fw_config.dts index 3df94bf92..de5f95d5e 100644 --- a/plat/arm/board/tc0/fdts/tc0_tb_fw_config.dts +++ b/plat/arm/board/tc0/fdts/tc0_tb_fw_config.dts @@ -27,6 +27,12 @@ secure-partitions { compatible = "arm,sp"; +#if OPTEE_SP_FW_CONFIG + op-tee { + uuid = <0x486178e0 0xe7f811e3 0xbc5e0002 0xa5d5c51b>; + load-address = <0xfd280000>; + }; +#else cactus-primary { uuid = <0xb4b5671e 0x4a904fe1 0xb81ffb13 0xdae1dacb>; load-address = <0xfe000000>; @@ -43,5 +49,6 @@ uuid = <0x79b55c73 0x1d8c44b9 0x859361e1 0x770ad8d2>; load-address = <0xfe200000>; }; +#endif }; }; diff --git a/plat/arm/board/tc0/include/platform_def.h b/plat/arm/board/tc0/include/platform_def.h index 72a035f0a..2ff2699b3 100644 --- a/plat/arm/board/tc0/include/platform_def.h +++ b/plat/arm/board/tc0/include/platform_def.h @@ -112,7 +112,7 @@ * little space for growth. */ #if TRUSTED_BOARD_BOOT -# define PLAT_ARM_MAX_BL2_SIZE 0x1E000 +# define PLAT_ARM_MAX_BL2_SIZE 0x20000 #else # define PLAT_ARM_MAX_BL2_SIZE 0x14000 #endif diff --git a/plat/arm/board/tc0/platform.mk b/plat/arm/board/tc0/platform.mk index 5d2cc38c4..6cc5f4618 100644 --- a/plat/arm/board/tc0/platform.mk +++ b/plat/arm/board/tc0/platform.mk @@ -86,8 +86,12 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) ifeq (${SPD},spmd) -FDT_SOURCES += ${TC0_BASE}/fdts/${PLAT}_spmc_manifest.dts -TC0_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb +ifeq ($(ARM_SPMC_MANIFEST_DTS),) +ARM_SPMC_MANIFEST_DTS := ${TC0_BASE}/fdts/${PLAT}_spmc_manifest.dts +endif + +FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} +TC0_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb # Add the TOS_FW_CONFIG to FIP and specify the same to certtool $(eval $(call TOOL_ADD_PAYLOAD,${TC0_TOS_FW_CONFIG},--tos-fw-config,${TC0_TOS_FW_CONFIG}))