libc: Use printf and snprintf across codebase

tf_printf and tf_snprintf are now called printf and snprintf, so the
code needs to be updated.

Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit is contained in:
Antonio Nino Diaz 2018-08-16 16:46:06 +01:00
parent 870ce3ddd3
commit 39b6cc66d6
18 changed files with 84 additions and 80 deletions

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@ -6,6 +6,7 @@
#include <debug.h>
#include <stdlib.h>
#include <stdio.h>
/* mbed TLS headers */
#include <mbedtls/memory_buffer_alloc.h>
@ -45,10 +46,8 @@ void mbedtls_init(void)
mbedtls_memory_buffer_alloc_init(heap, MBEDTLS_HEAP_SIZE);
#ifdef MBEDTLS_PLATFORM_SNPRINTF_ALT
/* Use reduced version of snprintf to save space. */
mbedtls_platform_set_snprintf(tf_snprintf);
mbedtls_platform_set_snprintf(snprintf);
#endif
ready = 1;
}
}

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@ -96,8 +96,8 @@ static void dump_amb_adec(void)
uint32_t size, size_count;
/* Dump all AMB windows */
tf_printf("bank attribute base size\n");
tf_printf("--------------------------------------------\n");
printf("bank attribute base size\n");
printf("--------------------------------------------\n");
for (win_id = 0; win_id < AMB_MAX_WIN_ID; win_id++) {
ctrl = mmio_read_32(AMB_WIN_CR_OFFSET(win_id));
if (ctrl & WIN_ENABLE_BIT) {
@ -105,8 +105,8 @@ static void dump_amb_adec(void)
attr = (ctrl >> AMB_ATTR_OFFSET) & AMB_ATTR_MASK;
size_count = (ctrl >> AMB_SIZE_OFFSET) & AMB_SIZE_MASK;
size = (size_count + 1) * AMB_WIN_ALIGNMENT_64K;
tf_printf("amb 0x%04x 0x%08x 0x%08x\n",
attr, base, size);
printf("amb 0x%04x 0x%08x 0x%08x\n",
attr, base, size);
}
}
}

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@ -20,7 +20,7 @@
/* common defines */
#define WIN_ENABLE_BIT (0x1)
/* Physical address of the base of the window = {AddrLow[19:0],20h0} */
/* Physical address of the base of the window = {AddrLow[19:0],20'h0} */
#define ADDRESS_SHIFT (20 - 4)
#define ADDRESS_MASK (0xFFFFFFF0)
#define CCU_WIN_ALIGNMENT (0x100000)
@ -40,8 +40,8 @@ static void dump_ccu(int ap_index)
uint64_t start, end;
/* Dump all AP windows */
tf_printf("\tbank target start end\n");
tf_printf("\t----------------------------------------------------\n");
printf("\tbank target start end\n");
printf("\t----------------------------------------------------\n");
for (win_id = 0; win_id < MVEBU_CCU_MAX_WINS; win_id++) {
win_cr = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id));
if (win_cr & WIN_ENABLE_BIT) {
@ -53,13 +53,13 @@ static void dump_ccu(int ap_index)
win_id));
start = ((uint64_t)alr << ADDRESS_SHIFT);
end = (((uint64_t)ahr + 0x10) << ADDRESS_SHIFT);
tf_printf("\tccu %02x 0x%016llx 0x%016llx\n",
target_id, start, end);
printf("\tccu %02x 0x%016llx 0x%016llx\n",
target_id, start, end);
}
}
win_cr = mmio_read_32(CCU_WIN_GCR_OFFSET(ap_index));
target_id = (win_cr >> CCU_GCR_TARGET_OFFSET) & CCU_GCR_TARGET_MASK;
tf_printf("\tccu GCR %d - all other transactions\n", target_id);
printf("\tccu GCR %d - all other transactions\n", target_id);
}
#endif

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@ -18,7 +18,7 @@
/* #define DEBUG_COMPHY */
#ifdef DEBUG_COMPHY
#define debug(format...) tf_printf(format)
#define debug(format...) printf(format)
#else
#define debug(format, arg...)
#endif

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@ -153,8 +153,8 @@ static void dump_gwin(int ap_index)
uint32_t win_num;
/* Dump all GWIN windows */
tf_printf("\tbank target start end\n");
tf_printf("\t----------------------------------------------------\n");
printf("\tbank target start end\n");
printf("\t----------------------------------------------------\n");
for (win_num = 0; win_num < MVEBU_GWIN_MAX_WINS; win_num++) {
uint32_t cr;
uint64_t alr, ahr;
@ -166,8 +166,8 @@ static void dump_gwin(int ap_index)
alr = (alr >> ADDRESS_LSHIFT) << ADDRESS_RSHIFT;
ahr = mmio_read_32(GWIN_AHR_OFFSET(ap_index, win_num));
ahr = (ahr >> ADDRESS_LSHIFT) << ADDRESS_RSHIFT;
tf_printf("\tgwin %d 0x%016llx 0x%016llx\n",
(cr >> 8) & 0xF, alr, ahr);
printf("\tgwin %d 0x%016llx 0x%016llx\n",
(cr >> 8) & 0xF, alr, ahr);
}
}
}

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@ -158,8 +158,8 @@ static void dump_io_win(int ap_index)
uint64_t start, end;
/* Dump all IO windows */
tf_printf("\tbank target start end\n");
tf_printf("\t----------------------------------------------------\n");
printf("\tbank target start end\n");
printf("\t----------------------------------------------------\n");
for (win_id = 0; win_id < MVEBU_IO_WIN_MAX_WINS; win_id++) {
alr = mmio_read_32(IO_WIN_ALR_OFFSET(ap_index, win_id));
if (alr & WIN_ENABLE_BIT) {
@ -169,13 +169,13 @@ static void dump_io_win(int ap_index)
win_id));
start = ((uint64_t)alr << ADDRESS_SHIFT);
end = (((uint64_t)ahr + 0x10) << ADDRESS_SHIFT);
tf_printf("\tio-win %d 0x%016llx 0x%016llx\n",
trgt_id, start, end);
printf("\tio-win %d 0x%016llx 0x%016llx\n",
trgt_id, start, end);
}
}
tf_printf("\tio-win gcr is %x\n",
mmio_read_32(MVEBU_IO_WIN_BASE(ap_index) +
MVEBU_IO_WIN_GCR_OFFSET));
printf("\tio-win gcr is %x\n",
mmio_read_32(MVEBU_IO_WIN_BASE(ap_index) +
MVEBU_IO_WIN_GCR_OFFSET));
}
#endif

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@ -52,8 +52,8 @@ static void iob_win_check(struct addr_map_win *win, uint32_t win_num)
win->base_addr = ALIGN_UP(win->base_addr, IOB_WIN_ALIGNMENT);
ERROR("Window %d: base address unaligned to 0x%x\n",
win_num, IOB_WIN_ALIGNMENT);
tf_printf("Align up the base address to 0x%llx\n",
win->base_addr);
printf("Align up the base address to 0x%llx\n",
win->base_addr);
}
/* size parameter validity check */
@ -61,7 +61,7 @@ static void iob_win_check(struct addr_map_win *win, uint32_t win_num)
win->win_size = ALIGN_UP(win->win_size, IOB_WIN_ALIGNMENT);
ERROR("Window %d: window size unaligned to 0x%x\n", win_num,
IOB_WIN_ALIGNMENT);
tf_printf("Aligning size to 0x%llx\n", win->win_size);
printf("Aligning size to 0x%llx\n", win->win_size);
}
}
@ -96,8 +96,8 @@ static void dump_iob(void)
"PEX0 ", "NAND ", "RUNIT", "MCI1 " };
/* Dump all IOB windows */
tf_printf("bank id target start end\n");
tf_printf("----------------------------------------------------\n");
printf("bank id target start end\n");
printf("----------------------------------------------------\n");
for (win_id = 0; win_id < MVEBU_IOB_MAX_WINS; win_id++) {
win_cr = mmio_read_32(IOB_WIN_CR_OFFSET(win_id));
if (win_cr & WIN_ENABLE_BIT) {
@ -114,9 +114,9 @@ static void dump_iob(void)
*/
end = start + (16 << 20);
}
tf_printf("iob %02d %s 0x%016llx 0x%016llx\n",
win_id, iob_target_name[target_id],
start, end);
printf("iob %02d %s 0x%016llx 0x%016llx\n",
win_id, iob_target_name[target_id],
start, end);
}
}
}

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@ -11,6 +11,7 @@
#include <mbr.h>
#include <partition.h>
#include <platform.h>
#include <stdio.h>
#include <string.h>
static uint8_t mbr_sector[PARTITION_BLOCK_SIZE];
@ -24,7 +25,7 @@ static void dump_entries(int num)
VERBOSE("Partition table with %d entries:\n", num);
for (i = 0; i < num; i++) {
len = tf_snprintf(name, EFI_NAMELEN, "%s", list.list[i].name);
len = snprintf(name, EFI_NAMELEN, "%s", list.list[i].name);
for (j = 0; j < EFI_NAMELEN - len - 1; j++) {
name[len + j] = ' ';
}

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@ -17,6 +17,7 @@
#include <mmio.h>
#include <platform.h>
#include <stdint.h>
#include <stdio.h>
#include <stm32mp1_clk.h>
#include <stm32mp1_clkfunc.h>
#include <stm32mp1_dt.h>
@ -1344,7 +1345,7 @@ int stm32mp1_clk_init(void)
for (i = (enum stm32mp1_pll_id)0; i < _PLL_NB; i++) {
char name[12];
tf_snprintf(name, sizeof(name), "st,pll@%d", i);
snprintf(name, sizeof(name), "st,pll@%d", i);
plloff[i] = fdt_rcc_subnode_offset(name);
if (!fdt_check_node(plloff[i])) {

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@ -9,6 +9,7 @@
#include <console.h>
#include <debug.h>
#include <platform.h>
#include <stdio.h>
/*
* Only print the output if PLAT_LOG_LEVEL_ASSERT is higher or equal to
@ -18,14 +19,14 @@
#if PLAT_LOG_LEVEL_ASSERT >= LOG_LEVEL_VERBOSE
void __assert(const char *file, unsigned int line, const char *assertion)
{
tf_printf("ASSERT: %s:%d:%s\n", file, line, assertion);
printf("ASSERT: %s:%d:%s\n", file, line, assertion);
console_flush();
plat_panic_handler();
}
#elif PLAT_LOG_LEVEL_ASSERT >= LOG_LEVEL_INFO
void __assert(const char *file, unsigned int line)
{
tf_printf("ASSERT: %s:%d\n", file, line);
printf("ASSERT: %s:%d\n", file, line);
console_flush();
plat_panic_handler();
}

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@ -9,7 +9,7 @@
#include <stdint.h>
/***********************************************************
* The tf_printf implementation for all BL stages
* The printf implementation for all BL stages
***********************************************************/
#define get_num_va_args(_args, _lcount) \

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@ -178,7 +178,7 @@ int pmf_get_timestamp_smc(unsigned int tid,
*/
void __pmf_dump_timestamp(unsigned int tid, unsigned long long ts)
{
tf_printf("PMF:cpu %u tid %u ts %llu\n",
printf("PMF:cpu %u tid %u ts %llu\n",
plat_my_core_pos(), tid, ts);
}

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@ -27,7 +27,7 @@
(((level) == U(0)) ? LVL0_SPACER : \
(((level) == U(1)) ? LVL1_SPACER : \
(((level) == U(2)) ? LVL2_SPACER : LVL3_SPACER)))
#define debug_print(...) tf_printf(__VA_ARGS__)
#define debug_print(...) printf(__VA_ARGS__)
#else
#define debug_print(...) ((void)0)
#endif

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@ -11,6 +11,7 @@
#include <platform_def.h>
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <utils_def.h>
#include <xlat_tables_defs.h>
#include <xlat_tables_v2.h>
@ -33,16 +34,16 @@ void xlat_tables_print(__unused xlat_ctx_t *ctx)
void xlat_mmap_print(const mmap_region_t *mmap)
{
tf_printf("mmap:\n");
printf("mmap:\n");
const mmap_region_t *mm = mmap;
while (mm->size != 0U) {
tf_printf(" VA:0x%lx PA:0x%llx size:0x%zx attr:0x%x "
"granularity:0x%zx\n", mm->base_va, mm->base_pa,
mm->size, mm->attr, mm->granularity);
printf(" VA:0x%lx PA:0x%llx size:0x%zx attr:0x%x granularity:0x%zx\n",
mm->base_va, mm->base_pa, mm->size, mm->attr,
mm->granularity);
++mm;
};
tf_printf("\n");
printf("\n");
}
/* Print the attributes of the specified block descriptor. */
@ -52,18 +53,18 @@ static void xlat_desc_print(const xlat_ctx_t *ctx, uint64_t desc)
int xlat_regime = ctx->xlat_regime;
if (mem_type_index == ATTR_IWBWA_OWBWA_NTR_INDEX) {
tf_printf("MEM");
printf("MEM");
} else if (mem_type_index == ATTR_NON_CACHEABLE_INDEX) {
tf_printf("NC");
printf("NC");
} else {
assert(mem_type_index == ATTR_DEVICE_INDEX);
tf_printf("DEV");
printf("DEV");
}
if ((xlat_regime == EL3_REGIME) || (xlat_regime == EL2_REGIME)) {
/* For EL3 and EL2 only check the AP[2] and XN bits. */
tf_printf(((desc & LOWER_ATTRS(AP_RO)) != 0ULL) ? "-RO" : "-RW");
tf_printf(((desc & UPPER_ATTRS(XN)) != 0ULL) ? "-XN" : "-EXEC");
printf(((desc & LOWER_ATTRS(AP_RO)) != 0ULL) ? "-RO" : "-RW");
printf(((desc & UPPER_ATTRS(XN)) != 0ULL) ? "-XN" : "-EXEC");
} else {
assert(xlat_regime == EL1_EL0_REGIME);
/*
@ -81,18 +82,18 @@ static void xlat_desc_print(const xlat_ctx_t *ctx, uint64_t desc)
assert((xn_perm == xn_mask) || (xn_perm == 0ULL));
#endif
tf_printf(((desc & LOWER_ATTRS(AP_RO)) != 0ULL) ? "-RO" : "-RW");
printf(((desc & LOWER_ATTRS(AP_RO)) != 0ULL) ? "-RO" : "-RW");
/* Only check one of PXN and UXN, the other one is the same. */
tf_printf(((desc & UPPER_ATTRS(PXN)) != 0ULL) ? "-XN" : "-EXEC");
printf(((desc & UPPER_ATTRS(PXN)) != 0ULL) ? "-XN" : "-EXEC");
/*
* Privileged regions can only be accessed from EL1, user
* regions can be accessed from EL1 and EL0.
*/
tf_printf(((desc & LOWER_ATTRS(AP_ACCESS_UNPRIVILEGED)) != 0ULL)
printf(((desc & LOWER_ATTRS(AP_ACCESS_UNPRIVILEGED)) != 0ULL)
? "-USER" : "-PRIV");
}
tf_printf(((LOWER_ATTRS(NS) & desc) != 0ULL) ? "-NS" : "-S");
printf(((LOWER_ATTRS(NS) & desc) != 0ULL) ? "-NS" : "-S");
}
static const char * const level_spacers[] = {
@ -135,18 +136,18 @@ static void xlat_tables_print_internal(xlat_ctx_t *ctx, uintptr_t table_base_va,
if ((desc & DESC_MASK) == INVALID_DESC) {
if (invalid_row_count == 0) {
tf_printf("%sVA:0x%lx size:0x%zx\n",
level_spacers[level],
table_idx_va, level_size);
printf("%sVA:0x%lx size:0x%zx\n",
level_spacers[level],
table_idx_va, level_size);
}
invalid_row_count++;
} else {
if (invalid_row_count > 1) {
tf_printf(invalid_descriptors_ommited,
level_spacers[level],
invalid_row_count - 1);
printf(invalid_descriptors_ommited,
level_spacers[level],
invalid_row_count - 1);
}
invalid_row_count = 0;
@ -163,9 +164,9 @@ static void xlat_tables_print_internal(xlat_ctx_t *ctx, uintptr_t table_base_va,
* but instead points to the next translation
* table in the translation table walk.
*/
tf_printf("%sVA:0x%lx size:0x%zx\n",
level_spacers[level],
table_idx_va, level_size);
printf("%sVA:0x%lx size:0x%zx\n",
level_spacers[level],
table_idx_va, level_size);
uintptr_t addr_inner = desc & TABLE_ADDR_MASK;
@ -173,13 +174,12 @@ static void xlat_tables_print_internal(xlat_ctx_t *ctx, uintptr_t table_base_va,
(uint64_t *)addr_inner,
XLAT_TABLE_ENTRIES, level + 1U);
} else {
tf_printf("%sVA:0x%lx PA:0x%llx size:0x%zx ",
level_spacers[level],
table_idx_va,
(uint64_t)(desc & TABLE_ADDR_MASK),
level_size);
printf("%sVA:0x%lx PA:0x%llx size:0x%zx ",
level_spacers[level], table_idx_va,
(uint64_t)(desc & TABLE_ADDR_MASK),
level_size);
xlat_desc_print(ctx, desc);
tf_printf("\n");
printf("\n");
}
}
@ -188,8 +188,8 @@ static void xlat_tables_print_internal(xlat_ctx_t *ctx, uintptr_t table_base_va,
}
if (invalid_row_count > 1) {
tf_printf(invalid_descriptors_ommited,
level_spacers[level], invalid_row_count - 1);
printf(invalid_descriptors_ommited,
level_spacers[level], invalid_row_count - 1);
}
}
@ -364,7 +364,7 @@ static int xlat_get_mem_attributes_internal(const xlat_ctx_t *ctx,
#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
VERBOSE("Attributes: ");
xlat_desc_print(ctx, desc);
tf_printf("\n");
printf("\n");
#endif /* LOG_LEVEL >= LOG_LEVEL_VERBOSE */
assert(attributes != NULL);

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@ -11,6 +11,7 @@
#include <mmio.h>
#include <platform_def.h>
#include <stdarg.h>
#include <stdio.h>
#include <string.h>
static int ipc_init;
@ -63,7 +64,7 @@ int hisi_cpus_powered_off_besides_curr(unsigned int cpu)
static void hisi_ipc_send(unsigned int ipc_num)
{
if (!ipc_init) {
tf_printf("error ipc base is null!!!\n");
printf("error ipc base is null!!!\n");
return;
}

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@ -35,7 +35,7 @@ int imx_pwr_domain_on(u_register_t mpidr)
cluster_id = MPIDR_AFFLVL1_VAL(mpidr);
cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
tf_printf("imx_pwr_domain_on cluster_id %d, cpu_id %d\n", cluster_id, cpu_id);
printf("imx_pwr_domain_on cluster_id %d, cpu_id %d\n", cluster_id, cpu_id);
if (cluster_id == 0) {
sc_pm_set_resource_power_mode(ipc_handle, SC_R_A53,
@ -94,7 +94,7 @@ void imx_pwr_domain_off(const psci_power_state_t *target_state)
SC_PM_WAKE_SRC_NONE);
if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr));
tf_printf("turn off cluster:%d core:%d\n", cluster_id, cpu_id);
printf("turn off cluster:%d core:%d\n", cluster_id, cpu_id);
}
void imx_domain_suspend(const psci_power_state_t *target_state)

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@ -25,7 +25,7 @@ int imx_pwr_domain_on(u_register_t mpidr)
cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
tf_printf("imx_pwr_domain_on cpu_id %d\n", cpu_id);
printf("imx_pwr_domain_on cpu_id %d\n", cpu_id);
if (sc_pm_set_resource_power_mode(ipc_handle, ap_core_index[cpu_id],
SC_PM_PW_MODE_ON) != SC_ERR_NONE) {
@ -61,7 +61,7 @@ void imx_pwr_domain_off(const psci_power_state_t *target_state)
plat_gic_cpuif_disable();
sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id],
SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_NONE);
tf_printf("turn off core:%d\n", cpu_id);
printf("turn off core:%d\n", cpu_id);
}
void imx_domain_suspend(const psci_power_state_t *target_state)

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@ -6,6 +6,7 @@
#include <debug.h>
#include <runtime_svc.h>
#include <stdio.h>
#include "generic-arm64-smcall.h"
@ -29,14 +30,14 @@ static void trusty_dputc(char ch, int secure)
s->linebuf[s->l++] = ch;
if (s->l == sizeof(s->linebuf) || ch == '\n') {
if (secure)
tf_printf("secure os: ");
printf("secure os: ");
else
tf_printf("non-secure os: ");
printf("non-secure os: ");
for (i = 0; i < s->l; i++) {
putchar(s->linebuf[i]);
}
if (ch != '\n') {
tf_printf(" <...>\n");
printf(" <...>\n");
}
s->l = 0;
}