Update readme.md for v1.3
Update the release notes (readme.md) for the ARM Trusted Firmware v1.3 release. Change-Id: Ia1f4eb1897e63eeab7d69a593ba0ad91d50043f5 Signed-off-by: Dan Handley <dan.handley@arm.com>
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readme.md
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readme.md
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ARM Trusted Firmware - version 1.2
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ARM Trusted Firmware - version 1.3
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==================================
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ARM Trusted Firmware provides a reference implementation of secure world
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@ -17,17 +17,25 @@ to the benefit of all developers working with ARMv8-A TrustZone technology.
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License
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-------
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The software is provided under a BSD 3-Clause [license]. Certain source files
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are derived from FreeBSD code: the original license is included in these
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source files.
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The software is provided under a BSD-3-Clause [license]. Contributions to this
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project are accepted under the same license with developer sign-off as
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described in the [Contributing Guidelines].
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This project contains code from other projects as listed below. The original
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license text is included in those source files.
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* The stdlib source code is derived from FreeBSD code.
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* The libfdt source code is dual licensed. It is used by this project under
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the terms of the BSD-2-Clause license.
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This Release
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------------
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This release provides a suitable starting point for productization of secure
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world boot and runtime firmware. Future versions will contain new features,
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optimizations and quality improvements.
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world boot and runtime firmware, executing in either the AArch32 or AArch64
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execution state.
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Users are encouraged to do their own security validation, including penetration
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testing, on any secure world code derived from ARM Trusted Firmware.
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@ -42,7 +50,7 @@ testing, on any secure world code derived from ARM Trusted Firmware.
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* Library support for CPU specific reset and power down sequences. This
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includes support for errata workarounds.
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* Drivers for both the version 2.0 and version 3.0 ARM Generic Interrupt
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* Drivers for both versions 2.0 and 3.0 of the ARM Generic Interrupt
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Controller specifications (GICv2 and GICv3). The latter also enables GICv3
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hardware systems that do not contain legacy GICv2 support.
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@ -53,18 +61,26 @@ testing, on any secure world code derived from ARM Trusted Firmware.
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* SMC (Secure Monitor Call) handling, conforming to the [SMC Calling
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Convention][SMCCC] using an EL3 runtime services framework.
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* SMC handling relating to [PSCI] for the Secondary CPU Boot, CPU Hotplug,
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CPU Idle and System Shutdown/Reset/Suspend use-cases.
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* [PSCI] library support for the Secondary CPU Boot, CPU Hotplug, CPU Idle
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and System Shutdown/Reset/Suspend use-cases.
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This library is pre-integrated with the provided AArch64 EL3 Runtime
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Software, and is also suitable for integration into other EL3 Runtime
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Software.
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* A minimal AArch32 Secure Payload to demonstrate [PSCI] library integration
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on platforms with AArch32 EL3 Runtime Software.
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* Secure Monitor library code such as world switching, EL1 context management
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and interrupt routing. This must be integrated with a Secure-EL1 Payload
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Dispatcher (SPD) component to customize the interaction with a Secure-EL1
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Payload (SP), for example a Secure OS.
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and interrupt routing.
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When using the provided AArch64 EL3 Runtime Software, this must be
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integrated with a Secure-EL1 Payload Dispatcher (SPD) component to
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customize the interaction with a Secure-EL1 Payload (SP), for example a
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Secure OS.
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* A Test Secure-EL1 Payload and Dispatcher to demonstrate Secure Monitor
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functionality and Secure-EL1 interaction with PSCI.
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* A Test Secure-EL1 Payload and Dispatcher to demonstrate AArch64 Secure
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Monitor functionality and Secure-EL1 interaction with PSCI.
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* SPDs for the [OP-TEE Secure OS] and [NVidia Trusted Little Kernel]
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* AArch64 SPDs for the [OP-TEE Secure OS] and [NVidia Trusted Little Kernel]
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[NVidia TLK].
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* A Trusted Board Boot implementation, conforming to all mandatory TBBR
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Firmware Update (or recovery mode) boot flow, and packaging of the various
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firmware images into a Firmware Image Package (FIP) to be loaded from
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non-volatile storage.
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The TBBR implementation is currently only supported in the AArch64 build.
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* Support for alternative boot flows. Some platforms have their own boot
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firmware and only require the ARM Trusted Firmware Secure Monitor
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functionality. Other platforms require minimal initialization before
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booting into an arbitrary EL3 payload.
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firmware and only require the AArch64 EL3 Runtime Software provided by this
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project. Other platforms require minimal initialization before booting
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into an arbitrary EL3 payload.
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For a full description of functionality and implementation details, please
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see the [Firmware Design] and supporting documentation. The [Change Log]
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### Platforms
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This release of the Trusted Firmware has been tested on variants r0 and r1 of
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the [Juno ARM Development Platform] [Juno] with [Linaro Release 15.10]
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[Linaro Release Notes].
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The AArch64 build of this release has been tested on variants r0, r1 and r2
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of the [Juno ARM Development Platform] [Juno] with [Linaro Release 16.06].
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The Trusted Firmware has also been tested on the 64-bit Linux versions of the
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following ARM [FVP]s:
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The AArch64 build of this release has been tested on the following ARM
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[FVP]s (64-bit host machine only):
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* `Foundation_Platform` (Version 9.4, Build 9.4.59)
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* `FVP_Base_AEMv8A-AEMv8A` (Version 7.0, Build 0.8.7004)
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* `FVP_Base_Cortex-A57x4-A53x4` (Version 7.0, Build 0.8.7004)
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* `FVP_Base_Cortex-A57x1-A53x1` (Version 7.0, Build 0.8.7004)
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* `FVP_Base_Cortex-A57x2-A53x4` (Version 7.0, Build 0.8.7004)
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* `Foundation_Platform` (Version 10.1, Build 10.1.32)
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* `FVP_Base_AEMv8A-AEMv8A` (Version 7.7, Build 0.8.7701)
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* `FVP_Base_Cortex-A57x4-A53x4` (Version 7.7, Build 0.8.7701)
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* `FVP_Base_Cortex-A57x1-A53x1` (Version 7.7, Build 0.8.7701)
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* `FVP_Base_Cortex-A57x2-A53x4` (Version 7.7, Build 0.8.7701)
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The AArch32 build of this release has been tested on the following ARM
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[FVP]s (64-bit host machine only):
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* `FVP_Base_AEMv8A-AEMv8A` (Version 7.7, Build 0.8.7701)
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* `FVP_Base_Cortex-A32x4` (Version 10.1, Build 10.1.32)
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The Foundation FVP can be downloaded free of charge. The Base FVPs can be
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licensed from ARM: see [www.arm.com/fvp] [FVP].
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This release also contains the following platform support:
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* MediaTek MT6795 and MT8173 SoCs
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* NVidia T210 and T132 SoCs
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* MediaTek MT8173 SoC
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* QEMU emulator
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* RockChip RK3368 and RK3399 SoCs
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* Xilinx Zynq UltraScale + MPSoC
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### Still to Come
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* Complete implementation of the [PSCI] v1.0 specification.
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* Support for new CPUs and System IP.
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* AArch32 TBBR support and ongoing TBBR alignment.
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* More platform support.
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* Optimization and quality improvements.
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* Ongoing support for new architectural features, CPUs and System IP.
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* Ongoing [PSCI] alignment and feature support.
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* Ongoing security hardening, optimization and quality improvements.
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For a full list of detailed issues in the current code, please see the [Change
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Log] and the [GitHub issue tracker].
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@ -147,7 +174,7 @@ ARM licensees may contact ARM directly via their partner managers.
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- - - - - - - - - - - - - - - - - - - - - - - - - -
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_Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved._
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_Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved._
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[License]: ./license.md "BSD license for ARM Trusted Firmware"
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[GitHub issue tracker]: https://github.com/ARM-software/tf-issues/issues
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[OP-TEE Secure OS]: https://github.com/OP-TEE/optee_os
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[NVidia TLK]: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/ote_partner/tlk.git;a=summary
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[Linaro Release Notes]: https://community.arm.com/docs/DOC-10952#jive_content_id_Linaro_Release_1510
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[Linaro Release 16.06]: https://community.arm.com/docs/DOC-10952#jive_content_id_Linaro_Release_1606
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