mt8173: Move SPM related PLL settings to ARM TF
Move SPM related PLL settings to spm_boot_init in ARM TF SPM driver Change-Id: I414b896caae072570c8de33a25e06db4ae011f57 Signed-off-by: yt.lee <yt.lee@mediatek.com>
This commit is contained in:
parent
cc04b843ba
commit
3c454d52e1
|
@ -386,6 +386,8 @@ void spm_boot_init(void)
|
||||||
{
|
{
|
||||||
/* Only CPU0 is online during boot, initialize cpu online reserve bit */
|
/* Only CPU0 is online during boot, initialize cpu online reserve bit */
|
||||||
mmio_write_32(SPM_PCM_RESERVE, 0xFE);
|
mmio_write_32(SPM_PCM_RESERVE, 0xFE);
|
||||||
|
mmio_clrbits_32(AP_PLL_CON3, 0xFFFFF);
|
||||||
|
mmio_clrbits_32(AP_PLL_CON4, 0xF);
|
||||||
spm_lock_init();
|
spm_lock_init();
|
||||||
spm_register_init();
|
spm_register_init();
|
||||||
}
|
}
|
||||||
|
|
|
@ -129,6 +129,9 @@
|
||||||
#define SPM_SLEEP_CA15_WFI2_EN (SPM_BASE + 0xf18)
|
#define SPM_SLEEP_CA15_WFI2_EN (SPM_BASE + 0xf18)
|
||||||
#define SPM_SLEEP_CA15_WFI3_EN (SPM_BASE + 0xf1c)
|
#define SPM_SLEEP_CA15_WFI3_EN (SPM_BASE + 0xf1c)
|
||||||
|
|
||||||
|
#define AP_PLL_CON3 0x1020900c
|
||||||
|
#define AP_PLL_CON4 0x10209010
|
||||||
|
|
||||||
#define SPM_PROJECT_CODE 0xb16
|
#define SPM_PROJECT_CODE 0xb16
|
||||||
|
|
||||||
#define SPM_REGWR_EN (1U << 0)
|
#define SPM_REGWR_EN (1U << 0)
|
||||||
|
|
Loading…
Reference in New Issue