From 3d66ca6d8cf35f198d637f8fda233601fcfb04d7 Mon Sep 17 00:00:00 2001 From: Heyi Guo Date: Wed, 13 May 2020 16:25:37 +0800 Subject: [PATCH] tzc400: fix logical error in FILTER_BIT definitions The filters parameter passed to tzc400_configure_region() is supposed to be filter bit flag without bit shift, so the macros TZC_400_REGION_ATTR_FILTER_BIT and TZC_400_REGION_ATTR_FILTER_BIT_ALL should always construct the value without any shift. It is not a functional issue for TZC_REGION_ATTR_F_EN_SHIFT is lucky to be 0. Signed-off-by: Heyi Guo Change-Id: I5d363c462b8517256523f637e670eefa56722afd --- include/drivers/arm/tzc400.h | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h index 32aeb0350..cf2e82bc5 100644 --- a/include/drivers/arm/tzc400.h +++ b/include/drivers/arm/tzc400.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -80,11 +80,8 @@ /* Filter enable bits in a TZC */ #define TZC_400_REGION_ATTR_F_EN_MASK U(0xf) -#define TZC_400_REGION_ATTR_FILTER_BIT(x) \ - ((U(1) << (x)) << TZC_REGION_ATTR_F_EN_SHIFT) -#define TZC_400_REGION_ATTR_FILTER_BIT_ALL \ - (TZC_400_REGION_ATTR_F_EN_MASK << \ - TZC_REGION_ATTR_F_EN_SHIFT) +#define TZC_400_REGION_ATTR_FILTER_BIT(x) (U(1) << (x)) +#define TZC_400_REGION_ATTR_FILTER_BIT_ALL TZC_400_REGION_ATTR_F_EN_MASK /* * All TZC region configuration registers are placed one after another. It