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Merge changes from topic "fwu-refactor" into integration 

* changes:
  refactor(plat/arm): use mmio* functions to read/write NVFLAGS registers
  refactor(plat/arm): mark the flash region as read-only
  refactor(plat/arm): update NV flags on image load/authentication failure
This commit is contained in:
Manish Pandey 2021-07-20 17:24:18 +02:00 committed by TrustedFirmware Code Review
parent e18f4aaf5e aa79421c16
commit 3d88d1136d
5 changed files with 35 additions and 38 deletions
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22
plat/arm/board/fvp/fvp_bl1_setup.c
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@ -1,15 +1,17 @@
/*
* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
#include <errno.h>
#include <bl1/bl1.h>
#include <common/tbbr/tbbr_img_def.h>
#include <drivers/arm/smmu_v3.h>
#include <drivers/arm/sp805.h>
#include <lib/mmio.h>
#include <plat/arm/common/arm_config.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/arm/common/arm_def.h>
@ -61,6 +63,12 @@ void bl1_platform_setup(void)
__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
{
uint32_t nv_flags = mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
/* Clear the NV flags register. */
mmio_write_32((V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR),
nv_flags);
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
@ -124,3 +132,15 @@ int bl1_plat_handle_post_image_load(unsigned int image_id)
return 0;
}
#endif /* MEASURED_BOOT */
/*******************************************************************************
* The following function checks if Firmware update is needed by checking error
* reported in NV flag.
******************************************************************************/
bool plat_arm_bl1_fwu_needed(void)
{
int32_t nv_flags = (int32_t)mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
/* if image load/authentication failed */
return ((nv_flags == -EAUTH) || (nv_flags == -ENOENT));
}

5
plat/arm/board/fvp/fvp_common.c
View File

@ -72,14 +72,11 @@ arm_config_t arm_config;
* Table of memory regions for various BL stages to map using the MMU.
* This doesn't include Trusted SRAM as setup_page_tables() already takes care
* of mapping it.
*
* The flash needs to be mapped as writable in order to erase the FIP's Table of
* Contents in case of unrecoverable error (see plat_error_handler()).
*/
#ifdef IMAGE_BL1
const mmap_region_t plat_arm_mmap[] = {
ARM_MAP_SHARED_RAM,
V2M_MAP_FLASH0_RW,
V2M_MAP_FLASH0_RO,
V2M_MAP_IOFPGA,
MAP_DEVICE0,
#if FVP_INTERCONNECT_DRIVER == FVP_CCN

24
plat/arm/board/fvp/fvp_err.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
* Copyright (c) 2019-2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,6 +9,7 @@
#include <common/debug.h>
#include <drivers/arm/sp805.h>
#include <drivers/cfi/v2m_flash.h>
#include <lib/mmio.h>
#include <plat/arm/common/plat_arm.h>
#include <platform_def.h>
@ -17,25 +18,8 @@
*/
__dead2 void plat_arm_error_handler(int err)
{
int ret;
switch (err) {
case -ENOENT:
case -EAUTH:
/* Image load or authentication error. Erase the ToC */
INFO("Erasing FIP ToC from flash...\n");
(void)nor_unlock(PLAT_ARM_FLASH_IMAGE_BASE);
ret = nor_word_program(PLAT_ARM_FLASH_IMAGE_BASE, 0);
if (ret != 0) {
ERROR("Cannot erase ToC\n");
} else {
INFO("Done\n");
}
break;
default:
/* Unexpected error */
break;
}
/* Propagate the err code in the NV-flags register */
mmio_write_32(V2M_SYS_NVFLAGS_ADDR, (uint32_t)err);
console_flush();

16
plat/arm/board/juno/juno_bl1_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -62,11 +62,11 @@ static int is_watchdog_reset(void)
******************************************************************************/
bool plat_arm_bl1_fwu_needed(void)
{
const int32_t *nv_flags_ptr = (const int32_t *)V2M_SYS_NVFLAGS_ADDR;
int32_t nv_flags = (int32_t)mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
/* Check if TOC is invalid or watchdog reset happened. */
return (!arm_io_is_toc_valid() || (((*nv_flags_ptr == -EAUTH) ||
(*nv_flags_ptr == -ENOENT)) && is_watchdog_reset()));
return (!arm_io_is_toc_valid() || (((nv_flags == -EAUTH) ||
(nv_flags == -ENOENT)) && is_watchdog_reset()));
}
/*******************************************************************************
@ -86,13 +86,11 @@ void bl1_plat_set_ep_info(unsigned int image_id,
******************************************************************************/
__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
{
unsigned int *nv_flags_clr = (unsigned int *)
(V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR);
unsigned int *nv_flags_ptr = (unsigned int *)
(V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS);
uint32_t nv_flags = mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
/* Clear the NV flags register. */
*nv_flags_clr = *nv_flags_ptr;
mmio_write_32((V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR),
nv_flags);
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);

6
plat/arm/board/juno/juno_err.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -16,10 +16,8 @@
*/
void __dead2 plat_arm_error_handler(int err)
{
uint32_t *flags_ptr = (uint32_t *)V2M_SYS_NVFLAGS_ADDR;
/* Propagate the err code in the NV-flags register */
*flags_ptr = err;
mmio_write_32(V2M_SYS_NVFLAGS_ADDR, (uint32_t)err);
/* Setup the watchdog to reset the system as soon as possible */
sp805_refresh(ARM_SP805_TWDG_BASE, 1U);