Merge pull request #671 from antonio-nino-diaz-arm/an/unoptimised-mem
ARM platforms: Define common image sizes
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commit
405f42f9cb
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@ -465,12 +465,13 @@ map is explained in the [Firmware Design].
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match the frame used by the Non-Secure image (normally the Linux kernel).
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Default is true (access to the frame is allowed).
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* `ARM_BOARD_OPTIMISE_MMAP`: Boolean option to enable or disable optimisation
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of page table and MMU related macros `PLAT_ARM_MMAP_ENTRIES` and
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`MAX_XLAT_TABLES`. By default this flag is 0, which means it uses the
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default unoptimised values for these macros. ARM development platforms
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that wish to optimise memory usage for page tables need to set this flag to 1
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and must override the related macros.
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* `ARM_BOARD_OPTIMISE_MEM`: Boolean option to enable or disable optimisation
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of the memory reserved for each image. This affects the maximum size of each
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BL image as well as the number of allocated memory regions and translation
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tables. By default this flag is 0, which means it uses the default
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unoptimised values for these macros. ARM development platforms that wish to
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optimise memory usage need to set this flag to 1 and must override the
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related macros.
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* 'ARM_BL31_IN_DRAM': Boolean option to select loading of BL31 in TZC secured
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DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
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@ -61,10 +61,10 @@
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/*
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* The constants below are not optimised for memory usage. Platforms that wish
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* to optimise these constants should set `ARM_BOARD_OPTIMISE_MMAP` to 1 and
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* to optimise these constants should set `ARM_BOARD_OPTIMISE_MEM` to 1 and
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* provide there own values.
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*/
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#if !ARM_BOARD_OPTIMISE_MMAP
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#if !ARM_BOARD_OPTIMISE_MEM
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/*
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* PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
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* plat_arm_mmap array defined for each BL stage.
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@ -81,7 +81,29 @@
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# define MAX_XLAT_TABLES 5
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#endif
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#endif /* ARM_BOARD_OPTIMISE_MMAP */
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/*
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* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
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* plus a little space for growth.
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*/
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#define PLAT_ARM_MAX_BL1_RW_SIZE 0xA000
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/*
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* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
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* little space for growth.
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*/
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL2_SIZE 0x1D000
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#else
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# define PLAT_ARM_MAX_BL2_SIZE 0xF000
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#endif
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/*
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* PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a
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* little space for growth.
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*/
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#define PLAT_ARM_MAX_BL31_SIZE 0x1D000
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#endif /* ARM_BOARD_OPTIMISE_MEM */
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#define MAX_IO_DEVICES 3
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#define MAX_IO_HANDLES 4
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@ -61,8 +61,8 @@ ifneq (${TRUSTED_BOARD_BOOT},0)
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endif
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# This flag controls whether memory usage needs to be optimised
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ARM_BOARD_OPTIMISE_MMAP ?= 0
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ARM_BOARD_OPTIMISE_MEM ?= 0
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# Process flags
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$(eval $(call assert_boolean,ARM_BOARD_OPTIMISE_MMAP))
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$(eval $(call add_define,ARM_BOARD_OPTIMISE_MMAP))
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$(eval $(call assert_boolean,ARM_BOARD_OPTIMISE_MEM))
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$(eval $(call add_define,ARM_BOARD_OPTIMISE_MEM))
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@ -146,26 +146,4 @@
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#define PLAT_ARM_G0_IRQS ARM_G0_IRQS
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/*
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* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
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* plus a little space for growth.
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*/
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#define PLAT_ARM_MAX_BL1_RW_SIZE 0xA000
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/*
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* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
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* little space for growth.
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*/
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL2_SIZE 0x1D000
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#else
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# define PLAT_ARM_MAX_BL2_SIZE 0xC000
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#endif
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/*
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* PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a
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* little space for growth.
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*/
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#define PLAT_ARM_MAX_BL31_SIZE 0x1D000
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#endif /* __PLATFORM_DEF_H__ */
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@ -74,10 +74,10 @@
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#endif /* TRUSTED_BOARD_BOOT */
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/*
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* If ARM_BOARD_OPTIMISE_MMAP=0 then Juno uses the default, unoptimised values
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* If ARM_BOARD_OPTIMISE_MEM=0 then Juno uses the default, unoptimised values
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* defined for ARM development platforms.
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*/
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#if ARM_BOARD_OPTIMISE_MMAP
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#if ARM_BOARD_OPTIMISE_MEM
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/*
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* PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
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* plat_arm_mmap array defined for each BL stage.
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@ -107,7 +107,33 @@
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# define MAX_XLAT_TABLES 3
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#endif
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#endif /* ARM_BOARD_OPTIMISE_MMAP */
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/*
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* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
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* plus a little space for growth.
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*/
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL1_RW_SIZE 0x9000
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#else
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# define PLAT_ARM_MAX_BL1_RW_SIZE 0x6000
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#endif
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/*
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* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
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* little space for growth.
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*/
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL2_SIZE 0x1D000
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#else
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# define PLAT_ARM_MAX_BL2_SIZE 0xC000
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#endif
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/*
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* PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a
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* little space for growth.
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*/
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#define PLAT_ARM_MAX_BL31_SIZE 0x1D000
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#endif /* ARM_BOARD_OPTIMISE_MEM */
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/* CCI related constants */
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#define PLAT_ARM_CCI_BASE 0x2c090000
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@ -183,30 +209,4 @@
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/* CSS SoC NIC-400 Global Programmers View (GPV) */
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#define PLAT_SOC_CSS_NIC400_BASE 0x2a000000
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/*
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* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
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* plus a little space for growth.
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*/
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL1_RW_SIZE 0x9000
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#else
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# define PLAT_ARM_MAX_BL1_RW_SIZE 0x6000
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#endif
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/*
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* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
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* little space for growth.
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*/
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#if TRUSTED_BOARD_BOOT
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# define PLAT_ARM_MAX_BL2_SIZE 0x1D000
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#else
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# define PLAT_ARM_MAX_BL2_SIZE 0xC000
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#endif
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/*
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* PLAT_ARM_MAX_BL31_SIZE is calculated using the current BL31 debug size plus a
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* little space for growth.
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*/
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#define PLAT_ARM_MAX_BL31_SIZE 0x1D000
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#endif /* __PLATFORM_DEF_H__ */
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@ -79,7 +79,7 @@ SKIP_A57_L1_FLUSH_PWR_DWN := 1
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ENABLE_PLAT_COMPAT := 0
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# Enable memory map related constants optimisation
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ARM_BOARD_OPTIMISE_MMAP := 1
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ARM_BOARD_OPTIMISE_MEM := 1
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include plat/arm/board/common/board_css.mk
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include plat/arm/common/arm_common.mk
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