Merge pull request #367 from soby-mathew/sm/mig_guide_fix
docs: Fixes to platform-migration-guide.md
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@ -57,7 +57,7 @@ based affinity instances map directly to power domains. A power domain, as
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described in section 4.2 of [PSCI], could contain a core or a logical group
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of cores (a cluster) which share some state on which power management
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operations can be performed. The existing affinity instance based APIs
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`plat_get_aff_count()` and `plat_get_aff_count()` are deprecated. The new
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`plat_get_aff_count()` and `plat_get_aff_state()` are deprecated. The new
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platform interfaces that are introduced for this framework are:
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* `plat_core_pos_by_mpidr()`
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@ -100,8 +100,8 @@ The state-ID field in the power-state parameter of a CPU_SUSPEND call can be
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used to describe the composite power states specific to a platform. The existing
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PSCI state coordination had the limitation that it operates on a run/off
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granularity of power states and it did not interpret the state-ID field. This
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was acceptable as the specification requirement in PSCI 0.2. The framework's
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approach to coordination only requires maintaining a reference
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was acceptable as the specification requirement in PSCI 0.2 and the framework's
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approach to coordination only required maintaining a reference
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count of the number of cores that have requested the cluster to remain powered.
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In the PSCI 1.0 specification, this approach is non optimal. If composite
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@ -173,7 +173,8 @@ handlers, the major differences are:
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The PSCI 1.0 implementation depends on the `validate_power_state` handler to
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convert the power-state parameter (possibly encoding a composite power state)
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passed in a PSCI `CPU_SUSPEND` to the `psci_power_state` format.
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passed in a PSCI `CPU_SUSPEND` to the `psci_power_state` format. This handler
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is now mandatory for PSCI `CPU_SUSPEND` support.
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The `plat_psci_ops` handlers, `pwr_domain_off` and `pwr_domain_suspend`, are
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passed the target local state for each affected power domain. The platform
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@ -209,7 +210,7 @@ layer and the platform layer.
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![Image 1](diagrams/psci-suspend-sequence.png?raw=true)
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Refer [plat/arm/board/fvp/fvp_pm.c] for the implementation details of
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these handlers for the FVP. The commit b6df6ccbc88cc14592f5e603ef580d3cbf4733c3
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these handlers for the FVP. The commit 38dce70f51fb83b27958ba3e2ad15f5635cb1061
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demonstrates the migration of ARM reference platforms to the new platform API.
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@ -259,7 +260,7 @@ correspond directly to the power domain levels.
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The compatibility layer dynamically constructs the new topology
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description array by querying the platform using `plat_get_aff_count()`
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and `plat_get_aff_count()` APIs. The linear index returned by
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and `plat_get_aff_state()` APIs. The linear index returned by
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`platform_get_core_pos()` is used as the core index for the cores. The
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higher level (non-core) power domain nodes must know the cores contained
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within its domain. It does so by storing the core index of first core
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