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allwinner: Disable USE_COHERENT_MEM 

According to the documentation, platforms may choose to trade memory
footprint for performance (and elegancy) by not providing a separately
mapped coherent page.

Since a debug build is getting close to the SRAM size limit already, this
allows us to save about 3.5KB of BSS and have some room for future
enhancements.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2018-10-11 22:14:30 +01:00
parent c3af6b0052
commit 4306051365
3 changed files with 4 additions and 4 deletions
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3
plat/allwinner/common/allwinner-common.mk
View File

@ -52,3 +52,6 @@ SEPARATE_CODE_AND_RODATA := 1
# BL31 gets loaded alongside BL33 (U-Boot) by U-Boot's SPL
RESET_TO_BL31 := 1
# We are short on memory, so save 3.5KB by not having an extra coherent page.
USE_COHERENT_MEM := 0

2
plat/allwinner/common/include/platform_def.h
View File

@ -27,7 +27,7 @@
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT)
#define MAX_MMAP_REGIONS (4 + PLATFORM_MMAP_REGIONS)
#define MAX_MMAP_REGIONS (3 + PLATFORM_MMAP_REGIONS)
#define MAX_XLAT_TABLES 1
#define PLAT_MAX_PWR_LVL_STATES U(2)

3
plat/allwinner/common/sunxi_common.c
View File

@ -51,9 +51,6 @@ void sunxi_configure_mmu_el3(int flags)
mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE,
BL_RO_DATA_END - BL_RO_DATA_BASE,
MT_RO_DATA | MT_SECURE);
mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE,
BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
MT_DEVICE | MT_RW | MT_SECURE);
mmap_add(sunxi_mmap);
init_xlat_tables();