From 436cd754f2b0f9c0ce3094961bd1e179eeff2fc1 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 25 Sep 2020 16:42:06 +0100 Subject: [PATCH] feat(allwinner): add SMCCC SOCID support The Allwinner SID device holds a 16-bit SoC identifier, which we already use in our code. Export this number through the generic SMCCC SOCID interface, to allow an architectural identification of an Allwinner SoC. This enables access to this information from non-secure world, simplifies generic drivers (ACPI comes to mind), and gives easy and precise access to the SoC ID from userland in OSes like Linux. Change-Id: I91753046b2ae5408ca7bc0b864fcd97d24c8267c Signed-off-by: Andre Przywara --- plat/allwinner/common/include/sunxi_def.h | 3 +++ plat/allwinner/common/sunxi_common.c | 28 +++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/plat/allwinner/common/include/sunxi_def.h b/plat/allwinner/common/include/sunxi_def.h index ec50887d7..c17ef9529 100644 --- a/plat/allwinner/common/include/sunxi_def.h +++ b/plat/allwinner/common/include/sunxi_def.h @@ -20,4 +20,7 @@ #define SUNXI_SOC_H616 0x1823 #define SUNXI_SOC_R329 0x1851 +#define JEDEC_ALLWINNER_BKID 9U +#define JEDEC_ALLWINNER_MFID 0x9eU + #endif /* SUNXI_DEF_H */ diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index 82410b1ed..092659c0b 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -8,7 +8,9 @@ #include #include +#include #include +#include #include #include @@ -157,3 +159,29 @@ int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb) return 0; } + +int32_t plat_is_smccc_feature_available(u_register_t fid) +{ + switch (fid) { + case SMCCC_ARCH_SOC_ID: + return SMC_ARCH_CALL_SUCCESS; + default: + return SMC_ARCH_CALL_NOT_SUPPORTED; + } +} + +int32_t plat_get_soc_version(void) +{ + int32_t ret; + + ret = SOC_ID_SET_JEP_106(JEDEC_ALLWINNER_BKID, JEDEC_ALLWINNER_MFID); + + return ret | (sunxi_read_soc_id() & SOC_ID_IMPL_DEF_MASK); +} + +int32_t plat_get_soc_revision(void) +{ + uint32_t reg = mmio_read_32(SRAM_VER_REG); + + return reg & GENMASK_32(7, 0); +}