diff --git a/include/lib/cpus/aarch64/neoverse_zeus.h b/include/lib/cpus/aarch64/neoverse_v1.h similarity index 58% rename from include/lib/cpus/aarch64/neoverse_zeus.h rename to include/lib/cpus/aarch64/neoverse_v1.h index f0947271d..650eb4d41 100644 --- a/include/lib/cpus/aarch64/neoverse_zeus.h +++ b/include/lib/cpus/aarch64/neoverse_v1.h @@ -1,23 +1,23 @@ /* - * Copyright (c) 2019, ARM Limited. All rights reserved. + * Copyright (c) 2019-2020, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef NEOVERSE_ZEUS_H -#define NEOVERSE_ZEUS_H +#ifndef NEOVERSE_V1_H +#define NEOVERSE_V1_H -#define NEOVERSE_ZEUS_MIDR U(0x410FD400) +#define NEOVERSE_V1_MIDR U(0x410FD400) /******************************************************************************* * CPU Extended Control register specific definitions. ******************************************************************************/ -#define NEOVERSE_ZEUS_CPUECTLR_EL1 S3_0_C15_C1_4 +#define NEOVERSE_V1_CPUECTLR_EL1 S3_0_C15_C1_4 /******************************************************************************* * CPU Power Control register specific definitions ******************************************************************************/ -#define NEOVERSE_ZEUS_CPUPWRCTLR_EL1 S3_0_C15_C2_7 -#define NEOVERSE_ZEUS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) +#define NEOVERSE_V1_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define NEOVERSE_V1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) -#endif /* NEOVERSE_ZEUS_H */ +#endif /* NEOVERSE_V1_H */ diff --git a/lib/cpus/aarch64/neoverse_zeus.S b/lib/cpus/aarch64/neoverse_v1.S similarity index 50% rename from lib/cpus/aarch64/neoverse_zeus.S rename to lib/cpus/aarch64/neoverse_v1.S index 44882b459..733629425 100644 --- a/lib/cpus/aarch64/neoverse_zeus.S +++ b/lib/cpus/aarch64/neoverse_v1.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, ARM Limited. All rights reserved. + * Copyright (c) 2019-2020, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -7,46 +7,46 @@ #include #include #include -#include +#include #include #include /* Hardware handled coherency */ #if HW_ASSISTED_COHERENCY == 0 -#error "Neoverse Zeus must be compiled with HW_ASSISTED_COHERENCY enabled" +#error "Neoverse V1 must be compiled with HW_ASSISTED_COHERENCY enabled" #endif /* 64-bit only core */ #if CTX_INCLUDE_AARCH32_REGS == 1 -#error "Neoverse-Zeus supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" +#error "Neoverse-V1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" #endif /* --------------------------------------------- * HW will do the cache maintenance while powering down * --------------------------------------------- */ -func neoverse_zeus_core_pwr_dwn +func neoverse_v1_core_pwr_dwn /* --------------------------------------------- * Enable CPU power down bit in power control register * --------------------------------------------- */ - mrs x0, NEOVERSE_ZEUS_CPUPWRCTLR_EL1 - orr x0, x0, #NEOVERSE_ZEUS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT - msr NEOVERSE_ZEUS_CPUPWRCTLR_EL1, x0 + mrs x0, NEOVERSE_V1_CPUPWRCTLR_EL1 + orr x0, x0, #NEOVERSE_V1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT + msr NEOVERSE_V1_CPUPWRCTLR_EL1, x0 isb ret -endfunc neoverse_zeus_core_pwr_dwn +endfunc neoverse_v1_core_pwr_dwn /* - * Errata printing function for Neoverse Zeus. Must follow AAPCS. + * Errata printing function for Neoverse V1. Must follow AAPCS. */ #if REPORT_ERRATA -func neoverse_zeus_errata_report +func neoverse_v1_errata_report ret -endfunc neoverse_zeus_errata_report +endfunc neoverse_v1_errata_report #endif -func neoverse_zeus_reset_func +func neoverse_v1_reset_func mov x19, x30 /* Disable speculative loads */ @@ -54,10 +54,10 @@ func neoverse_zeus_reset_func isb ret x19 -endfunc neoverse_zeus_reset_func +endfunc neoverse_v1_reset_func /* --------------------------------------------- - * This function provides Neoverse-Zeus specific + * This function provides Neoverse-V1 specific * register information for crash reporting. * It needs to return with x6 pointing to * a list of register names in ascii and @@ -65,16 +65,16 @@ endfunc neoverse_zeus_reset_func * reported. * --------------------------------------------- */ -.section .rodata.neoverse_zeus_regs, "aS" -neoverse_zeus_regs: /* The ascii list of register names to be reported */ +.section .rodata.neoverse_v1_regs, "aS" +neoverse_v1_regs: /* The ascii list of register names to be reported */ .asciz "cpuectlr_el1", "" -func neoverse_zeus_cpu_reg_dump - adr x6, neoverse_zeus_regs - mrs x8, NEOVERSE_ZEUS_CPUECTLR_EL1 +func neoverse_v1_cpu_reg_dump + adr x6, neoverse_v1_regs + mrs x8, NEOVERSE_V1_CPUECTLR_EL1 ret -endfunc neoverse_zeus_cpu_reg_dump +endfunc neoverse_v1_cpu_reg_dump -declare_cpu_ops neoverse_zeus, NEOVERSE_ZEUS_MIDR, \ - neoverse_zeus_reset_func, \ - neoverse_zeus_core_pwr_dwn +declare_cpu_ops neoverse_v1, NEOVERSE_V1_MIDR, \ + neoverse_v1_reset_func, \ + neoverse_v1_core_pwr_dwn diff --git a/plat/arm/board/arm_fpga/platform.mk b/plat/arm/board/arm_fpga/platform.mk index 4b309fd03..4b751fb20 100644 --- a/plat/arm/board/arm_fpga/platform.mk +++ b/plat/arm/board/arm_fpga/platform.mk @@ -61,7 +61,7 @@ else lib/cpus/aarch64/cortex_a78.S \ lib/cpus/aarch64/neoverse_n1.S \ lib/cpus/aarch64/neoverse_e1.S \ - lib/cpus/aarch64/neoverse_zeus.S \ + lib/cpus/aarch64/neoverse_v1.S \ lib/cpus/aarch64/cortex_a78_ae.S \ lib/cpus/aarch64/cortex_a65.S \ lib/cpus/aarch64/cortex_a65ae.S \ diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index f2a2ede80..4da0d7643 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -120,7 +120,7 @@ else lib/cpus/aarch64/cortex_a78.S \ lib/cpus/aarch64/neoverse_n1.S \ lib/cpus/aarch64/neoverse_e1.S \ - lib/cpus/aarch64/neoverse_zeus.S \ + lib/cpus/aarch64/neoverse_v1.S \ lib/cpus/aarch64/cortex_a78_ae.S \ lib/cpus/aarch64/cortex_klein.S \ lib/cpus/aarch64/cortex_matterhorn.S \ diff --git a/plat/arm/board/rddaniel/platform.mk b/plat/arm/board/rddaniel/platform.mk index 8909b551c..7422d638a 100644 --- a/plat/arm/board/rddaniel/platform.mk +++ b/plat/arm/board/rddaniel/platform.mk @@ -12,7 +12,7 @@ RDDANIEL_BASE = plat/arm/board/rddaniel PLAT_INCLUDES += -I${RDDANIEL_BASE}/include/ -SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_zeus.S +SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S BL1_SOURCES += ${SGI_CPU_SOURCES} \ ${RDDANIEL_BASE}/rddaniel_err.c diff --git a/plat/arm/board/rddanielxlr/platform.mk b/plat/arm/board/rddanielxlr/platform.mk index 61af81aab..8cbad525c 100644 --- a/plat/arm/board/rddanielxlr/platform.mk +++ b/plat/arm/board/rddanielxlr/platform.mk @@ -13,7 +13,7 @@ RDDANIELXLR_BASE = plat/arm/board/rddanielxlr PLAT_INCLUDES += -I${RDDANIELXLR_BASE}/include/ -SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_zeus.S +SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_v1.S BL1_SOURCES += ${SGI_CPU_SOURCES} \ ${RDDANIELXLR_BASE}/rddanielxlr_err.c