FVP: Fix function for translating MPIDR to linear index
The current AArch32 version of plat_arm_calc_core_pos uses an incorrect
algorithm to calculate the linear position of a core / PE from its
MPIDR.
This patch corrects the algorithm to:
(ClusterId * FVP_MAX_CPUS_PER_CLUSTER) * FVP_MAX_PE_PER_CPU
+ (CPUId * FVP_MAX_PE_PER_CPU)
+ ThreadId
which supports cores where there are more than 1 PE per CPU.
NOTE: the AArch64 version was fixed in 39b21d1
Change-Id: I72aea89d8f72f8b1fef54e2177a0fa6fef0f5513
Signed-off-by: David Cunado <david.cunado@arm.com>
This commit is contained in:
parent
93883a2931
commit
468bea4128
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@ -104,15 +104,20 @@ func plat_is_my_cpu_primary
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bx lr
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endfunc plat_is_my_cpu_primary
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/* -----------------------------------------------------
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/* ---------------------------------------------------------------------
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* unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
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*
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* Function to calculate the core position on FVP.
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*
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* (ClusterId * FVP_MAX_CPUS_PER_CLUSTER) +
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* (ClusterId * FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU) +
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* (CPUId * FVP_MAX_PE_PER_CPU) +
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* ThreadId
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* -----------------------------------------------------
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*
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* which can be simplified as:
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*
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* ((ClusterId * FVP_MAX_CPUS_PER_CLUSTER + CPUId) * FVP_MAX_PE_PER_CPU)
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* + ThreadId
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* ---------------------------------------------------------------------
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*/
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func plat_arm_calc_core_pos
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mov r3, r0
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@ -125,14 +130,15 @@ func plat_arm_calc_core_pos
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lsleq r3, r0, #MPIDR_AFFINITY_BITS
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/* Extract individual affinity fields from MPIDR */
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mov r2, #FVP_MAX_PE_PER_CPU
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ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
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mla r0, r1, r2, r0
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mov r1, #FVP_MAX_CPUS_PER_CLUSTER
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ubfx r2, r3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
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mla r0, r1, r2, r0
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/* Compute linear position */
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mov r3, #FVP_MAX_CPUS_PER_CLUSTER
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mla r1, r2, r3, r1
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mov r3, #FVP_MAX_PE_PER_CPU
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mla r0, r1, r3, r0
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bx lr
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endfunc plat_arm_calc_core_pos
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