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Merge "Plat AXG: Fix PLAT_MAX_PWR_LVL value" into integration

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Joanna Farley 2021-01-05 07:57:15 +00:00 committed by TrustedFirmware Code Review
parent a31de1e80d 47f2445ad6
commit 4811168aaf
1 changed files with 2 additions and 2 deletions
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4
plat/amlogic/axg/include/platform_def.h
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -24,7 +24,7 @@
#define AML_PRIMARY_CPU U(0)
#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1
#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL2
#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
PLATFORM_CORE_COUNT)