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feat(tc): enable SMMU for DPU 

The SMMU needs to be enabled to support 8GB RAM

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: Ie81f2fc59886c52e9d6ed799ea73f49eb7a7c307
This commit is contained in:
Anders Dellien 2022-01-01 21:56:25 +00:00
parent ad60a42cd7
commit 4a6ebeeca3
1 changed files with 10 additions and 0 deletions
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10
fdts/tc.dts
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@ -454,6 +454,13 @@
>;
};
smmu: smmu@2ce00000 {
#iommu-cells = <1>;
compatible = "arm,smmu-v3";
reg = <0x0 0x2ce00000 0x0 0x20000>;
status = "okay";
};
dp0: display@2cc00000 {
#address-cells = <1>;
#size-cells = <0>;
@ -463,6 +470,9 @@
interrupt-names = "DPU";
clocks = <&scmi_clk 0>;
clock-names = "aclk";
iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
<&smmu 8>, <&smmu 9>;
pl0: pipeline@0 {
reg = <0>;
clocks = <&scmi_clk 1>;