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Define the Non-Secure timer frame ID for ARM platforms 

On Juno and FVP platforms, the Non-Secure System timer corresponds
to frame 1. However, this is a platform-specific decision and it
shouldn't be hard-coded. Hence, this patch introduces
PLAT_ARM_NSTIMER_FRAME_ID which should be used by all ARM platforms
to specify the correct non-secure timer frame.

Change-Id: I6c3a905d7d89200a2f58c20ce5d1e1d166832bba
This commit is contained in:
Vikram Kanigiri 2015-07-31 16:35:05 +01:00
parent e86c1ff0c9
commit 4b1439c5ae
3 changed files with 9 additions and 2 deletions
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3
include/plat/arm/css/common/css_def.h
View File

@ -113,4 +113,7 @@
#define PLAT_ARM_TZC_FILTERS REG_ATTR_FILTER_BIT_ALL
#define PLAT_ARM_TZC_BASE 0x2a4a0000
/* System timer related constants */
#define PLAT_ARM_NSTIMER_FRAME_ID 1
#endif /* __CSS_DEF_H__ */

3
plat/arm/board/fvp/include/platform_def.h
View File

@ -85,6 +85,9 @@
#define PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX 3
#define PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX 4
/* System timer related constants */
#define PLAT_ARM_NSTIMER_FRAME_ID 1
/* TrustZone controller related constants
*
* Currently only filters 0 and 2 are connected on Base FVP.

5
plat/arm/common/arm_bl31_setup.c
View File

@ -40,6 +40,7 @@
#include <mmio.h>
#include <plat_arm.h>
#include <platform.h>
#include <platform_def.h>
/*
@ -219,9 +220,9 @@ void arm_bl31_platform_setup(void)
reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);
reg_val |= (1 << CNTACR_RWVT_SHIFT) | (1 << CNTACR_RWPT_SHIFT);
mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTACR_BASE(1), reg_val);
mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTACR_BASE(PLAT_ARM_NSTIMER_FRAME_ID), reg_val);
reg_val = (1 << CNTNSAR_NS_SHIFT(1));
reg_val = (1 << CNTNSAR_NS_SHIFT(PLAT_ARM_NSTIMER_FRAME_ID));
mmio_write_32(ARM_SYS_TIMCTL_BASE + CNTNSAR, reg_val);
/* Initialize power controller before setting up topology */