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rcar_gen3: drivers: ddr-a: Update E3 DDR setting 

[IPL/DDR]
- Update E3 DDR setting rev.0.12.

Signed-off-by: Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ic9fb7ed1cd7588fab169a99c4070a8dfc40038dc
This commit is contained in:
Hiroyuki Nakano 2019-05-16 09:21:37 +09:00 committed by Marek Vasut
parent 274e8714ed
commit 4b5c1f3060
2 changed files with 4 additions and 12 deletions
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12
drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -100,12 +100,8 @@ uint32_t init_ddr(void)
#if RCAR_DRAM_DDR3L_MEMCONF == 0
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x0f030a02); /* 1GB */
#elif RCAR_DRAM_DDR3L_MEMCONF == 1
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030a02); /* 2GB(default) */
#elif RCAR_DRAM_DDR3L_MEMCONF == 2
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030b02); /* 4GB */
#else
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030a02); /* 2GB */
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030a02); /* 2GB(default) */
#endif
#if RCAR_DRAM_DDR3L_MEMDUAL == 1
@ -894,10 +890,6 @@ uint32_t recovery_from_backup_mode(void)
#if RCAR_DRAM_DDR3L_MEMCONF == 0
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x0f030a02);
#elif RCAR_DRAM_DDR3L_MEMCONF == 1
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030a02);
#elif RCAR_DRAM_DDR3L_MEMCONF == 2
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030b02);
#else
WriteReg_32(DBSC_E3_DBMEMCONF00, 0x10030a02);
#endif

4
drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,7 +9,7 @@
#include <stdint.h>
#define RCAR_E3_DDR_VERSION "rev.0.11"
#define RCAR_E3_DDR_VERSION "rev.0.12"
#ifdef ddr_qos_init_setting
#define REFRESH_RATE 3900 /* Average periodic refresh interval[ns]. Support 3900,7800 */