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Rework type usage in Trusted Firmware 

This patch reworks type usage in generic code, drivers and ARM platform files
to make it more portable. The major changes done with respect to
type usage are as listed below:

* Use uintptr_t for storing address instead of uint64_t or unsigned long.
* Review usage of unsigned long as it can no longer be assumed to be 64 bit.
* Use u_register_t for register values whose width varies depending on
  whether AArch64 or AArch32.
* Use generic C types where-ever possible.

In addition to the above changes, this patch also modifies format specifiers
in print invocations so that they are AArch64/AArch32 agnostic. Only files
related to upcoming feature development have been reworked.

Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
This commit is contained in:
Soby Mathew 2016-06-16 14:52:04 +01:00
parent aadb1350ee
commit 4c0d039076
35 changed files with 214 additions and 208 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
bl31/runtime_svc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -28,6 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <assert.h>
#include <debug.h>
#include <errno.h>
#include <runtime_svc.h>
@ -42,11 +43,14 @@
* 'rt_svc_descs_indices' array. This gives the index of the descriptor in the
* 'rt_svc_descs' array which contains the SMC handler.
******************************************************************************/
#define RT_SVC_DESCS_START ((uint64_t) (&__RT_SVC_DESCS_START__))
#define RT_SVC_DESCS_END ((uint64_t) (&__RT_SVC_DESCS_END__))
#define RT_SVC_DESCS_START ((uintptr_t) (&__RT_SVC_DESCS_START__))
#define RT_SVC_DESCS_END ((uintptr_t) (&__RT_SVC_DESCS_END__))
uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
static rt_svc_desc_t *rt_svc_descs;
#define RT_SVC_DECS_NUM ((RT_SVC_DESCS_END - RT_SVC_DESCS_START)\
/ sizeof(rt_svc_desc_t))
/*******************************************************************************
* Simple routine to sanity check a runtime service descriptor before using it
******************************************************************************/
@ -80,21 +84,20 @@ static int32_t validate_rt_svc_desc(rt_svc_desc_t *desc)
******************************************************************************/
void runtime_svc_init(void)
{
int32_t rc = 0;
uint32_t index, start_idx, end_idx;
uint64_t rt_svc_descs_num;
int rc = 0, index, start_idx, end_idx;
/* Assert the number of descriptors detected are less than maximum indices */
assert((RT_SVC_DECS_NUM >= 0) && (RT_SVC_DECS_NUM < MAX_RT_SVCS));
/* If no runtime services are implemented then simply bail out */
rt_svc_descs_num = RT_SVC_DESCS_END - RT_SVC_DESCS_START;
rt_svc_descs_num /= sizeof(rt_svc_desc_t);
if (rt_svc_descs_num == 0)
if (RT_SVC_DECS_NUM == 0)
return;
/* Initialise internal variables to invalid state */
memset(rt_svc_descs_indices, -1, sizeof(rt_svc_descs_indices));
rt_svc_descs = (rt_svc_desc_t *) RT_SVC_DESCS_START;
for (index = 0; index < rt_svc_descs_num; index++) {
for (index = 0; index < RT_SVC_DECS_NUM; index++) {
/*
* An invalid descriptor is an error condition since it is

57
common/bl_common.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -40,24 +40,20 @@
#include <string.h>
#include <xlat_tables.h>
unsigned long page_align(unsigned long value, unsigned dir)
uintptr_t page_align(uintptr_t value, unsigned dir)
{
unsigned long page_size = 1 << FOUR_KB_SHIFT;
/* Round up the limit to the next page boundary */
if (value & (page_size - 1)) {
value &= ~(page_size - 1);
if (value & (PAGE_SIZE - 1)) {
value &= ~(PAGE_SIZE - 1);
if (dir == UP)
value += page_size;
value += PAGE_SIZE;
}
return value;
}
static inline unsigned int is_page_aligned (unsigned long addr) {
const unsigned long page_size = 1 << FOUR_KB_SHIFT;
return (addr & (page_size - 1)) == 0;
static inline unsigned int is_page_aligned (uintptr_t addr) {
return (addr & (PAGE_SIZE - 1)) == 0;
}
/******************************************************************************
@ -65,8 +61,8 @@ static inline unsigned int is_page_aligned (unsigned long addr) {
* given the extents of free memory.
* Return 1 if it is free, 0 otherwise.
*****************************************************************************/
static int is_mem_free(uint64_t free_base, size_t free_size,
uint64_t addr, size_t size)
static int is_mem_free(uintptr_t free_base, size_t free_size,
uintptr_t addr, size_t size)
{
return (addr >= free_base) && (addr + size <= free_base + free_size);
}
@ -77,9 +73,9 @@ static int is_mem_free(uint64_t free_base, size_t free_size,
* size of the smallest chunk of free memory surrounding the sub-region in
* 'small_chunk_size'.
*****************************************************************************/
static unsigned int choose_mem_pos(uint64_t mem_start, uint64_t mem_end,
uint64_t submem_start, uint64_t submem_end,
size_t *small_chunk_size)
static unsigned int choose_mem_pos(uintptr_t mem_start, uintptr_t mem_end,
uintptr_t submem_start, uintptr_t submem_end,
size_t *small_chunk_size)
{
size_t top_chunk_size, bottom_chunk_size;
@ -106,8 +102,8 @@ static unsigned int choose_mem_pos(uint64_t mem_start, uint64_t mem_end,
* reflect the memory usage.
* The caller must ensure the memory to reserve is free.
*****************************************************************************/
void reserve_mem(uint64_t *free_base, size_t *free_size,
uint64_t addr, size_t size)
void reserve_mem(uintptr_t *free_base, size_t *free_size,
uintptr_t addr, size_t size)
{
size_t discard_size;
size_t reserved_size;
@ -127,26 +123,26 @@ void reserve_mem(uint64_t *free_base, size_t *free_size,
if (pos == BOTTOM)
*free_base = addr + size;
VERBOSE("Reserved 0x%lx bytes (discarded 0x%lx bytes %s)\n",
VERBOSE("Reserved 0x%zx bytes (discarded 0x%zx bytes %s)\n",
reserved_size, discard_size,
pos == TOP ? "above" : "below");
}
static void dump_load_info(unsigned long image_load_addr,
unsigned long image_size,
static void dump_load_info(uintptr_t image_load_addr,
size_t image_size,
const meminfo_t *mem_layout)
{
INFO("Trying to load image at address 0x%lx, size = 0x%lx\n",
image_load_addr, image_size);
INFO("Trying to load image at address %p, size = 0x%zx\n",
(void *)image_load_addr, image_size);
INFO("Current memory layout:\n");
INFO(" total region = [0x%lx, 0x%lx]\n", mem_layout->total_base,
mem_layout->total_base + mem_layout->total_size);
INFO(" free region = [0x%lx, 0x%lx]\n", mem_layout->free_base,
mem_layout->free_base + mem_layout->free_size);
INFO(" total region = [%p, %p]\n", (void *)mem_layout->total_base,
(void *)(mem_layout->total_base + mem_layout->total_size));
INFO(" free region = [%p, %p]\n", (void *)mem_layout->free_base,
(void *)(mem_layout->free_base + mem_layout->free_size));
}
/* Generic function to return the size of an image */
unsigned long image_size(unsigned int image_id)
size_t image_size(unsigned int image_id)
{
uintptr_t dev_handle;
uintptr_t image_handle;
@ -367,9 +363,8 @@ int load_auth_image(meminfo_t *mem_layout,
******************************************************************************/
void print_entry_point_info(const entry_point_info_t *ep_info)
{
INFO("Entry point address = 0x%llx\n",
(unsigned long long) ep_info->pc);
INFO("SPSR = 0x%lx\n", (unsigned long) ep_info->spsr);
INFO("Entry point address = %p\n", (void *)ep_info->pc);
INFO("SPSR = 0x%x\n", ep_info->spsr);
#define PRINT_IMAGE_ARG(n) \
VERBOSE("Argument #" #n " = 0x%llx\n", \

6
common/context_mgmt.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -285,7 +285,7 @@ void cm_el1_sysregs_context_restore(uint32_t security_state)
* This function populates ELR_EL3 member of 'cpu_context' pertaining to the
* given security state with the given entrypoint
******************************************************************************/
void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint)
void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint)
{
cpu_context_t *ctx;
el3_state_t *state;
@ -303,7 +303,7 @@ void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint)
* pertaining to the given security state
******************************************************************************/
void cm_set_elr_spsr_el3(uint32_t security_state,
uint64_t entrypoint, uint32_t spsr)
uintptr_t entrypoint, uint32_t spsr)
{
cpu_context_t *ctx;
el3_state_t *state;

6
docs/porting-guide.md
View File

@ -545,7 +545,7 @@ reset vector code to perform the above tasks.
### Function : plat_get_my_entrypoint() [mandatory when PROGRAMMABLE_RESET_ADDRESS == 0]
Argument : void
Return : unsigned long
Return : uintptr_t
This function is called with the called with the MMU and caches disabled
(`SCTLR_EL3.M` = 0 and `SCTLR_EL3.C` = 0). The function is responsible for
@ -748,7 +748,7 @@ provided in [plat/common/aarch64/platform_up_stack.S] and
### Function : plat_get_my_stack()
Argument : void
Return : unsigned long
Return : uintptr_t
This function returns the base address of the normal memory stack that
has been allocated for the current CPU. For BL images that only require a
@ -966,7 +966,7 @@ This function helps fulfill requirements 4 and 5 above.
### Function : bl1_init_bl2_mem_layout() [optional]
Argument : meminfo *, meminfo *, unsigned int, unsigned long
Argument : meminfo *, meminfo *
Return : void
BL1 needs to tell the next stage the amount of secure RAM available

2
docs/psci-pd-tree.md
View File

@ -203,7 +203,7 @@ typedef struct non_cpu_pwr_domain_node {
} non_cpu_pd_node_t;
typedef struct cpu_pwr_domain_node {
unsigned long mpidr;
u_register_t mpidr;
/* Index of the parent power domain node */
unsigned int parent_node;

20
docs/rt-svc-writers-guide.md
View File

@ -124,12 +124,12 @@ initialization and call handler functions.
* `_smch` is the SMC handler function with the `rt_svc_handle` signature:
typedef uint64_t (*rt_svc_handle)(uint32_t smc_fid,
uint64_t x1, uint64_t x2,
uint64_t x3, uint64_t x4,
typedef uintptr_t (*rt_svc_handle_t)(uint32_t smc_fid,
u_register_t x1, u_register_t x2,
u_register_t x3, u_register_t x4,
void *cookie,
void *handle,
uint64_t flags);
u_register_t flags);
Details of the requirements and behavior of the two callbacks is provided in
the following sections.
@ -189,12 +189,12 @@ SMC calls for a service are forwarded by the framework to the service's SMC
handler function (`_smch` in the service declaration). This function must have
the following signature:
typedef uint64_t (*rt_svc_handle)(uint32_t smc_fid,
uint64_t x1, uint64_t x2,
uint64_t x3, uint64_t x4,
void *reserved,
void *handle,
uint64_t flags);
typedef uintptr_t (*rt_svc_handle_t)(uint32_t smc_fid,
u_register_t x1, u_register_t x2,
u_register_t x3, u_register_t x4,
void *cookie,
void *handle,
u_register_t flags);
The handler is responsible for:

6
drivers/arm/ccn/ccn_private.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -104,7 +104,7 @@ typedef enum rn_types {
#define WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(region_id, stat_reg_offset, \
op_reg_offset, rn_id_map) \
{ \
uint64_t status_reg; \
unsigned long long status_reg; \
do { \
status_reg = ccn_reg_read((ccn_plat_desc->periphbase), \
(region_id), \
@ -208,7 +208,7 @@ typedef enum rn_types {
/*
* Helper function to return number of set bits in bitmap
*/
static inline unsigned int count_set_bits(uint64_t bitmap)
static inline unsigned int count_set_bits(unsigned long long bitmap)
{
unsigned int count = 0;

4
drivers/arm/gic/v3/gicv3_helpers.c
View File

@ -250,7 +250,7 @@ void gicv3_rdistif_base_addrs_probe(uintptr_t *rdistif_base_addrs,
uintptr_t gicr_base,
mpidr_hash_fn mpidr_to_core_pos)
{
unsigned long mpidr;
u_register_t mpidr;
unsigned int proc_num;
unsigned long long typer_val;
uintptr_t rdistif_base = gicr_base;
@ -320,7 +320,7 @@ void gicv3_secure_spis_configure(uintptr_t gicd_base,
unsigned int int_grp)
{
unsigned int index, irq_num;
uint64_t gic_affinity_val;
unsigned long long gic_affinity_val;
assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0));
/* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */

12
include/bl31/cpu_data.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -78,9 +78,9 @@
******************************************************************************/
typedef struct cpu_data {
void *cpu_context[2];
uint64_t cpu_ops_ptr;
uintptr_t cpu_ops_ptr;
#if CRASH_REPORTING
uint64_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3];
u_register_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3];
#endif
struct psci_cpu_data psci_svc_cpu_data;
#if PLAT_PCPU_DATA_SIZE
@ -123,14 +123,14 @@ void init_cpu_ops(void);
#define get_cpu_data_by_index(_ix, _m) _cpu_data_by_index(_ix)->_m
#define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = _v
#define flush_cpu_data(_m) flush_dcache_range((uint64_t) \
#define flush_cpu_data(_m) flush_dcache_range((uintptr_t) \
&(_cpu_data()->_m), \
sizeof(_cpu_data()->_m))
#define inv_cpu_data(_m) inv_dcache_range((uint64_t) \
#define inv_cpu_data(_m) inv_dcache_range((uintptr_t) \
&(_cpu_data()->_m), \
sizeof(_cpu_data()->_m))
#define flush_cpu_data_by_index(_ix, _m) \
flush_dcache_range((uint64_t) \
flush_dcache_range((uintptr_t) \
&(_cpu_data_by_index(_ix)->_m), \
sizeof(_cpu_data_by_index(_ix)->_m))

18
include/bl31/runtime_svc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -66,14 +66,14 @@ typedef int32_t (*rt_svc_init_t)(void);
* can be accessed using the handle pointer. The cookie parameter is reserved
* for future use
*/
typedef uint64_t (*rt_svc_handle_t)(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
typedef uintptr_t (*rt_svc_handle_t)(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
uint64_t flags);
u_register_t flags);
typedef struct rt_svc_desc {
uint8_t start_oen;
uint8_t end_oen;
@ -127,8 +127,8 @@ CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \
* Function & variable prototypes
******************************************************************************/
void runtime_svc_init(void);
extern uint64_t __RT_SVC_DESCS_START__;
extern uint64_t __RT_SVC_DESCS_END__;
extern uintptr_t __RT_SVC_DESCS_START__;
extern uintptr_t __RT_SVC_DESCS_END__;
void init_crash_reporting(void);
#endif /*__ASSEMBLY__*/

28
include/bl31/services/psci.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -296,13 +296,13 @@ typedef struct plat_psci_ops {
* migrate capability etc.
******************************************************************************/
typedef struct spd_pm_ops {
void (*svc_on)(uint64_t target_cpu);
int32_t (*svc_off)(uint64_t __unused);
void (*svc_suspend)(uint64_t max_off_pwrlvl);
void (*svc_on_finish)(uint64_t __unused);
void (*svc_suspend_finish)(uint64_t max_off_pwrlvl);
int32_t (*svc_migrate)(uint64_t from_cpu, uint64_t to_cpu);
int32_t (*svc_migrate_info)(uint64_t *resident_cpu);
void (*svc_on)(u_register_t target_cpu);
int32_t (*svc_off)(u_register_t __unused);
void (*svc_suspend)(u_register_t max_off_pwrlvl);
void (*svc_on_finish)(u_register_t __unused);
void (*svc_suspend_finish)(u_register_t max_off_pwrlvl);
int32_t (*svc_migrate)(u_register_t from_cpu, u_register_t to_cpu);
int32_t (*svc_migrate_info)(u_register_t *resident_cpu);
void (*svc_system_off)(void);
void (*svc_system_reset)(void);
} spd_pm_ops_t;
@ -328,14 +328,14 @@ int psci_features(unsigned int psci_fid);
void __dead2 psci_power_down_wfi(void);
void psci_entrypoint(void);
void psci_register_spd_pm_hook(const spd_pm_ops_t *);
uint64_t psci_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
uintptr_t psci_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
uint64_t flags);
u_register_t flags);
/* PSCI setup function */
int psci_setup(void);

55
include/common/bl_common.h
View File

@ -137,6 +137,7 @@
#include <cassert.h>
#include <stdint.h>
#include <stddef.h>
#include <types.h>
#include <utils.h> /* To retain compatibility */
/*
@ -144,28 +145,28 @@
* BL images
*/
#if SEPARATE_CODE_AND_RODATA
extern unsigned long __TEXT_START__;
extern unsigned long __TEXT_END__;
extern unsigned long __RODATA_START__;
extern unsigned long __RODATA_END__;
extern uintptr_t __TEXT_START__;
extern uintptr_t __TEXT_END__;
extern uintptr_t __RODATA_START__;
extern uintptr_t __RODATA_END__;
#else
extern unsigned long __RO_START__;
extern unsigned long __RO_END__;
extern uintptr_t __RO_START__;
extern uintptr_t __RO_END__;
#endif
#if IMAGE_BL2
extern unsigned long __BL2_END__;
extern uintptr_t __BL2_END__;
#elif IMAGE_BL2U
extern unsigned long __BL2U_END__;
extern uintptr_t __BL2U_END__;
#elif IMAGE_BL31
extern unsigned long __BL31_END__;
extern uintptr_t __BL31_END__;
#elif IMAGE_BL32
extern unsigned long __BL32_END__;
extern uintptr_t __BL32_END__;
#endif /* IMAGE_BLX */
#if USE_COHERENT_MEM
extern unsigned long __COHERENT_RAM_START__;
extern unsigned long __COHERENT_RAM_END__;
extern uintptr_t __COHERENT_RAM_START__;
extern uintptr_t __COHERENT_RAM_END__;
#endif
@ -174,21 +175,21 @@ extern unsigned long __COHERENT_RAM_END__;
* memory is available for its use and how much is already used.
******************************************************************************/
typedef struct meminfo {
uint64_t total_base;
uintptr_t total_base;
size_t total_size;
uint64_t free_base;
uintptr_t free_base;
size_t free_size;
} meminfo_t;
typedef struct aapcs64_params {
unsigned long arg0;
unsigned long arg1;
unsigned long arg2;
unsigned long arg3;
unsigned long arg4;
unsigned long arg5;
unsigned long arg6;
unsigned long arg7;
u_register_t arg0;
u_register_t arg1;
u_register_t arg2;
u_register_t arg3;
u_register_t arg4;
u_register_t arg5;
u_register_t arg6;
u_register_t arg7;
} aapcs64_params_t;
/***************************************************************************
@ -284,7 +285,7 @@ CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
__builtin_offsetof(entry_point_info_t, args), \
assert_BL31_args_offset_mismatch);
CASSERT(sizeof(unsigned long) ==
CASSERT(sizeof(uintptr_t) ==
__builtin_offsetof(entry_point_info_t, spsr) - \
__builtin_offsetof(entry_point_info_t, pc), \
assert_entrypoint_and_spsr_should_be_adjacent);
@ -292,8 +293,8 @@ CASSERT(sizeof(unsigned long) ==
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
unsigned long page_align(unsigned long, unsigned);
unsigned long image_size(unsigned int image_id);
uintptr_t page_align(uintptr_t, unsigned);
size_t image_size(unsigned int image_id);
int load_image(meminfo_t *mem_layout,
unsigned int image_id,
uintptr_t image_base,
@ -307,8 +308,8 @@ int load_auth_image(meminfo_t *mem_layout,
extern const char build_message[];
extern const char version_string[];
void reserve_mem(uint64_t *free_base, size_t *free_size,
uint64_t addr, size_t size);
void reserve_mem(uintptr_t *free_base, size_t *free_size,
uintptr_t addr, size_t size);
void print_entry_point_info(const entry_point_info_t *ep_info);

6
include/common/context_mgmt.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -63,9 +63,9 @@ void cm_init_context_by_index(unsigned int cpu_idx,
void cm_prepare_el3_exit(uint32_t security_state);
void cm_el1_sysregs_context_save(uint32_t security_state);
void cm_el1_sysregs_context_restore(uint32_t security_state);
void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint);
void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint);
void cm_set_elr_spsr_el3(uint32_t security_state,
uint64_t entrypoint, uint32_t spsr);
uintptr_t entrypoint, uint32_t spsr);
void cm_write_scr_el3_bit(uint32_t security_state,
uint32_t bit_pos,
uint32_t value);

5
include/drivers/arm/gic_v3.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -41,6 +41,7 @@
#include <mmio.h>
#include <stdint.h>
#include <types.h>
/* GICv3 Re-distributor interface registers & shifts */
@ -74,7 +75,7 @@
/*******************************************************************************
* Function prototypes
******************************************************************************/
uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr);
uintptr_t gicv3_get_rdist(uintptr_t gicr_base, u_register_t mpidr);
/*******************************************************************************
* GIC Redistributor interface accessors

5
include/drivers/arm/gicv3.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -170,6 +170,7 @@
#ifndef __ASSEMBLY__
#include <stdint.h>
#include <types.h>
#define gicv3_is_intr_id_special_identifier(id) \
(((id) >= PENDING_G1S_INTID) && ((id) <= GIC_SPURIOUS_INTERRUPT))
@ -234,7 +235,7 @@
* a hash function. Otherwise, the "Processor Number" field will be used to
* access the array elements.
******************************************************************************/
typedef unsigned int (*mpidr_hash_fn)(unsigned long mpidr);
typedef unsigned int (*mpidr_hash_fn)(u_register_t mpidr);
typedef struct gicv3_driver_data {
uintptr_t gicd_base;

15
include/lib/stdlib/machine/_stdint.h
View File

@ -30,6 +30,11 @@
* $FreeBSD$
*/
/*
* Portions copyright (c) 2016, ARM Limited and Contributors.
* All rights reserved.
*/
#ifndef _MACHINE__STDINT_H_
#define _MACHINE__STDINT_H_
@ -38,12 +43,12 @@
#define INT8_C(c) (c)
#define INT16_C(c) (c)
#define INT32_C(c) (c)
#define INT64_C(c) (c ## L)
#define INT64_C(c) (c ## LL)
#define UINT8_C(c) (c)
#define UINT16_C(c) (c)
#define UINT32_C(c) (c ## U)
#define UINT64_C(c) (c ## UL)
#define UINT64_C(c) (c ## ULL)
#define INTMAX_C(c) INT64_C(c)
#define UINTMAX_C(c) UINT64_C(c)
@ -60,19 +65,19 @@
#define INT8_MIN (-0x7f-1)
#define INT16_MIN (-0x7fff-1)
#define INT32_MIN (-0x7fffffff-1)
#define INT64_MIN (-0x7fffffffffffffffL-1)
#define INT64_MIN (-0x7fffffffffffffffLL-1)
/* Maximum values of exact-width signed integer types. */
#define INT8_MAX 0x7f
#define INT16_MAX 0x7fff
#define INT32_MAX 0x7fffffff
#define INT64_MAX 0x7fffffffffffffffL
#define INT64_MAX 0x7fffffffffffffffLL
/* Maximum values of exact-width unsigned integer types. */
#define UINT8_MAX 0xff
#define UINT16_MAX 0xffff
#define UINT32_MAX 0xffffffffU
#define UINT64_MAX 0xffffffffffffffffUL
#define UINT64_MAX 0xffffffffffffffffULL
/*
* ISO/IEC 9899:1999

16
include/plat/arm/common/plat_arm.h
View File

@ -45,15 +45,15 @@
/*
* Utility functions common to ARM standard platforms
*/
void arm_setup_page_tables(unsigned long total_base,
unsigned long total_size,
unsigned long code_start,
unsigned long code_limit,
unsigned long rodata_start,
unsigned long rodata_limit
void arm_setup_page_tables(uintptr_t total_base,
size_t total_size,
uintptr_t code_start,
uintptr_t code_limit,
uintptr_t rodata_start,
uintptr_t rodata_limit
#if USE_COHERENT_MEM
, unsigned long coh_start,
unsigned long coh_limit
, uintptr_t coh_start,
uintptr_t coh_limit
#endif
);

2
include/plat/common/platform.h
View File

@ -83,7 +83,7 @@ uint32_t plat_interrupt_type_to_line(uint32_t type,
/*******************************************************************************
* Optional common functions (may be overridden)
******************************************************************************/
unsigned long plat_get_my_stack(void);
uintptr_t plat_get_my_stack(void);
void plat_report_exception(unsigned long);
int plat_crash_console_init(void);
int plat_crash_console_putc(int c);

6
lib/locks/bakery/bakery_lock_normal.c
View File

@ -82,13 +82,13 @@ extern void *__PERCPU_BAKERY_LOCK_SIZE__;
#define write_cache_op(addr, cached) \
do { \
(cached ? dccvac((uint64_t)addr) :\
dcivac((uint64_t)addr));\
(cached ? dccvac((uintptr_t)addr) :\
dcivac((uintptr_t)addr));\
dsbish();\
} while (0)
#define read_cache_op(addr, cached) if (cached) \
dccivac((uint64_t)addr)
dccivac((uintptr_t)addr)
static unsigned int bakery_get_ticket(bakery_lock_t *lock,
unsigned int me, int is_cached)

1
lib/xlat_tables/aarch64/xlat_tables.c
View File

@ -47,7 +47,6 @@
CASSERT(ADDR_SPACE_SIZE >= (1ull << 31) && ADDR_SPACE_SIZE <= (1ull << 39) &&
IS_POWER_OF_TWO(ADDR_SPACE_SIZE), assert_valid_addr_space_size);
#define UNSET_DESC ~0ul
#define NUM_L1_ENTRIES (ADDR_SPACE_SIZE >> L1_XLAT_ADDRESS_SHIFT)
static uint64_t l1_xlation_table[NUM_L1_ENTRIES]

11
lib/xlat_tables/xlat_tables_common.c
View File

@ -35,6 +35,7 @@
#include <debug.h>
#include <platform_def.h>
#include <string.h>
#include <types.h>
#include <utils.h>
#include <xlat_tables.h>
@ -52,7 +53,7 @@
#define debug_print(...) ((void)0)
#endif
#define UNSET_DESC ~0ul
#define UNSET_DESC ~0ull
static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
__aligned(XLAT_TABLE_SIZE) __section("xlat_table");
@ -313,9 +314,9 @@ static mmap_region_t *init_xlation_table_inner(mmap_region_t *mm,
unsigned level_size_shift = L1_XLAT_ADDRESS_SHIFT - (level - 1) *
XLAT_TABLE_ENTRIES_SHIFT;
unsigned level_size = 1 << level_size_shift;
unsigned long long level_index_mask =
((unsigned long long) XLAT_TABLE_ENTRIES_MASK)
<< level_size_shift;
u_register_t level_index_mask =
(u_register_t)(((u_register_t) XLAT_TABLE_ENTRIES_MASK)
<< level_size_shift);
assert(level > 0 && level <= 3);
@ -357,7 +358,7 @@ static mmap_region_t *init_xlation_table_inner(mmap_region_t *mm,
/* Area not covered by a region so need finer table */
uint64_t *new_table = xlat_tables[next_xlat++];
assert(next_xlat <= MAX_XLAT_TABLES);
desc = TABLE_DESC | (uint64_t)new_table;
desc = TABLE_DESC | (uintptr_t)new_table;
/* Recurse to fill in new table */
mm = init_xlation_table_inner(mm, base_va,

2
plat/arm/board/fvp/aarch64/fvp_helpers.S
View File

@ -127,7 +127,7 @@ poll_mailbox:
endfunc plat_secondary_cold_boot_setup
/* ---------------------------------------------------------------------
* unsigned long plat_get_my_entrypoint (void);
* uintptr_t plat_get_my_entrypoint (void);
*
* Main job of this routine is to distinguish between a cold and warm
* boot. On FVP, this information can be queried from the power

16
plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -41,12 +41,12 @@
*/
ARM_INSTANTIATE_LOCK
unsigned int fvp_pwrc_get_cpu_wkr(unsigned long mpidr)
unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr)
{
return PSYSR_WK(fvp_pwrc_read_psysr(mpidr));
}
unsigned int fvp_pwrc_read_psysr(unsigned long mpidr)
unsigned int fvp_pwrc_read_psysr(u_register_t mpidr)
{
unsigned int rc;
arm_lock_get();
@ -56,21 +56,21 @@ unsigned int fvp_pwrc_read_psysr(unsigned long mpidr)
return rc;
}
void fvp_pwrc_write_pponr(unsigned long mpidr)
void fvp_pwrc_write_pponr(u_register_t mpidr)
{
arm_lock_get();
mmio_write_32(PWRC_BASE + PPONR_OFF, (unsigned int) mpidr);
arm_lock_release();
}
void fvp_pwrc_write_ppoffr(unsigned long mpidr)
void fvp_pwrc_write_ppoffr(u_register_t mpidr)
{
arm_lock_get();
mmio_write_32(PWRC_BASE + PPOFFR_OFF, (unsigned int) mpidr);
arm_lock_release();
}
void fvp_pwrc_set_wen(unsigned long mpidr)
void fvp_pwrc_set_wen(u_register_t mpidr)
{
arm_lock_get();
mmio_write_32(PWRC_BASE + PWKUPR_OFF,
@ -78,7 +78,7 @@ void fvp_pwrc_set_wen(unsigned long mpidr)
arm_lock_release();
}
void fvp_pwrc_clr_wen(unsigned long mpidr)
void fvp_pwrc_clr_wen(u_register_t mpidr)
{
arm_lock_get();
mmio_write_32(PWRC_BASE + PWKUPR_OFF,
@ -86,7 +86,7 @@ void fvp_pwrc_clr_wen(unsigned long mpidr)
arm_lock_release();
}
void fvp_pwrc_write_pcoffr(unsigned long mpidr)
void fvp_pwrc_write_pcoffr(u_register_t mpidr)
{
arm_lock_get();
mmio_write_32(PWRC_BASE + PCOFFR_OFF, (unsigned int) mpidr);

16
plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -64,13 +64,13 @@
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
void fvp_pwrc_write_pcoffr(unsigned long);
void fvp_pwrc_write_ppoffr(unsigned long);
void fvp_pwrc_write_pponr(unsigned long);
void fvp_pwrc_set_wen(unsigned long);
void fvp_pwrc_clr_wen(unsigned long);
unsigned int fvp_pwrc_read_psysr(unsigned long);
unsigned int fvp_pwrc_get_cpu_wkr(unsigned long);
void fvp_pwrc_write_pcoffr(u_register_t);
void fvp_pwrc_write_ppoffr(u_register_t);
void fvp_pwrc_write_pponr(u_register_t);
void fvp_pwrc_set_wen(u_register_t);
void fvp_pwrc_clr_wen(u_register_t);
unsigned int fvp_pwrc_read_psysr(u_register_t);
unsigned int fvp_pwrc_get_cpu_wkr(u_register_t);
#endif /*__ASSEMBLY__*/

2
plat/arm/board/juno/aarch64/juno_helpers.S
View File

@ -206,7 +206,7 @@ func plat_reset_handler
endfunc plat_reset_handler
/* -----------------------------------------------------
* unsigned int plat_arm_calc_core_pos(uint64_t mpidr)
* unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
* Helper function to calculate the core position.
* -----------------------------------------------------
*/

16
plat/arm/common/aarch64/arm_common.c
View File

@ -59,16 +59,16 @@ extern const mmap_region_t plat_arm_mmap[];
* - Read-only data section;
* - Coherent memory region, if applicable.
*/
void arm_setup_page_tables(unsigned long total_base,
unsigned long total_size,
unsigned long code_start,
unsigned long code_limit,
unsigned long rodata_start,
unsigned long rodata_limit
void arm_setup_page_tables(uintptr_t total_base,
size_t total_size,
uintptr_t code_start,
uintptr_t code_limit,
uintptr_t rodata_start,
uintptr_t rodata_limit
#if USE_COHERENT_MEM
,
unsigned long coh_start,
unsigned long coh_limit
uintptr_t coh_start,
uintptr_t coh_limit
#endif
)
{

4
plat/arm/common/aarch64/arm_helpers.S
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -49,7 +49,7 @@ func plat_my_core_pos
endfunc plat_my_core_pos
/* -----------------------------------------------------
* unsigned int plat_arm_calc_core_pos(uint64_t mpidr)
* unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
* Helper function to calculate the core position.
* With this function: CorePos = (ClusterId * 4) +
* CoreId

6
plat/arm/common/arm_bl31_setup.c
View File

@ -38,7 +38,7 @@
#include <plat_arm.h>
#include <platform.h>
#define BL31_END (unsigned long)(&__BL31_END__)
#define BL31_END (uintptr_t)(&__BL31_END__)
#if USE_COHERENT_MEM
/*
@ -48,8 +48,8 @@
* __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
* refer to page-aligned addresses.
*/
#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
#define BL31_COHERENT_RAM_BASE (uintptr_t)(&__COHERENT_RAM_START__)
#define BL31_COHERENT_RAM_LIMIT (uintptr_t)(&__COHERENT_RAM_END__)
#endif
/*

4
plat/arm/css/common/aarch64/css_helpers.S
View File

@ -70,7 +70,7 @@ poll_mailbox:
endfunc plat_secondary_cold_boot_setup
/* ---------------------------------------------------------------------
* unsigned long plat_get_my_entrypoint (void);
* uintptr_t plat_get_my_entrypoint (void);
*
* Main job of this routine is to distinguish between a cold and a warm
* boot. On CSS platforms, this distinction is based on the contents of
@ -90,7 +90,7 @@ func plat_get_my_entrypoint
endfunc plat_get_my_entrypoint
/* -----------------------------------------------------------
* unsigned int css_calc_core_pos_swap_cluster(uint64_t mpidr)
* unsigned int css_calc_core_pos_swap_cluster(u_register_t mpidr)
* Utility function to calculate the core position by
* swapping the cluster order. This is necessary in order to
* match the format of the boot information passed by the SCP

4
plat/common/aarch64/platform_mp_stack.S
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -159,7 +159,7 @@ func_deprecated platform_set_stack
endfunc_deprecated platform_set_stack
/* -----------------------------------------------------
* unsigned long plat_get_my_stack ()
* uintptr_t plat_get_my_stack ()
*
* For the current CPU, this function returns the stack
* pointer for a stack allocated in device memory.

4
plat/common/aarch64/platform_up_stack.S
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -40,7 +40,7 @@
.globl platform_get_stack
/* -----------------------------------------------------
* unsigned long plat_get_my_stack ()
* uintptr_t plat_get_my_stack ()
*
* For cold-boot BL images, only the primary CPU needs a
* stack. This function returns the stack pointer for a

12
services/std_svc/psci/psci_common.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -596,10 +596,10 @@ static int psci_get_ns_ep_info(entry_point_info_t *ep,
uintptr_t entrypoint,
u_register_t context_id)
{
unsigned long ep_attr, sctlr;
u_register_t ep_attr, sctlr;
unsigned int daif, ee, mode;
unsigned long ns_scr_el3 = read_scr_el3();
unsigned long ns_sctlr_el1 = read_sctlr_el1();
u_register_t ns_scr_el3 = read_scr_el3();
u_register_t ns_sctlr_el1 = read_sctlr_el1();
sctlr = ns_scr_el3 & SCR_HCE_BIT ? read_sctlr_el2() : ns_sctlr_el1;
ee = 0;
@ -839,9 +839,9 @@ void psci_print_power_domain_map(void)
for (idx = 0; idx < PLATFORM_CORE_COUNT; idx++) {
state = psci_get_cpu_local_state_by_idx(idx);
state_type = find_local_state_type(state);
INFO(" CPU Node : MPID 0x%lx, parent_node %d,"
INFO(" CPU Node : MPID 0x%llx, parent_node %d,"
" State %s (0x%x)\n",
psci_cpu_pd_nodes[idx].mpidr,
(unsigned long long)psci_cpu_pd_nodes[idx].mpidr,
psci_cpu_pd_nodes[idx].parent_node,
psci_state_type_str[state_type],
psci_get_cpu_local_state_by_idx(idx));

14
services/std_svc/psci/psci_main.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -327,14 +327,14 @@ int psci_features(unsigned int psci_fid)
/*******************************************************************************
* PSCI top level handler for servicing SMCs.
******************************************************************************/
uint64_t psci_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
uintptr_t psci_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
uint64_t flags)
u_register_t flags)
{
if (is_caller_secure(flags))
SMC_RET1(handle, SMC_UNK);

4
services/std_svc/psci/psci_private.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -214,7 +214,7 @@ unsigned int psci_is_last_on_cpu(void);
int psci_spd_migrate_info(u_register_t *mpidr);
/* Private exported functions from psci_on.c */
int psci_cpu_on_start(unsigned long target_cpu,
int psci_cpu_on_start(u_register_t target_cpu,
entry_point_info_t *ep);
void psci_cpu_on_finish(unsigned int cpu_idx,

14
services/std_svc/std_svc_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -54,14 +54,14 @@ static int32_t std_svc_setup(void)
* Top-level Standard Service SMC handler. This handler will in turn dispatch
* calls to PSCI SMC handler
*/
uint64_t std_svc_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
uintptr_t std_svc_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
uint64_t flags)
u_register_t flags)
{
/*
* Dispatch PSCI calls to PSCI SMC handler and return its return