Merge changes from topic "dcc_console" into integration
* changes: plat:xilinx:versal: Add JTAG DCC support plat:xilinx:zynqmp: Add JTAG DCC support drivers: dcc: Support JTAG DCC console
This commit is contained in:
commit
511c7f3a9d
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@ -142,6 +142,15 @@ eMMC/UFS drivers
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||||||
:|F|: include/drivers/ufs.h
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:|F|: include/drivers/ufs.h
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:|F|: include/drivers/synopsys/dw_mmc.h
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:|F|: include/drivers/synopsys/dw_mmc.h
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JTAG DCC console driver
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^^^^^^^^^^^^^^^^^^^^^^^
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:M: Michal Simek <michal.simek@xilinx.com>
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:G: `michalsimek`_
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:M: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
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:G: `venkatesh`_
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:F: drivers/arm/dcc/
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:F: include/drivers/arm/dcc.h
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|
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Power State Coordination Interface (PSCI)
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Power State Coordination Interface (PSCI)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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:|M|: Javier Almansa Sobrino <Javier.AlmansaSobrino@arm.com>
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:|M|: Javier Almansa Sobrino <Javier.AlmansaSobrino@arm.com>
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|
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@ -19,6 +19,11 @@ To build ATF for different platform (supported are "silicon"(default) and "versa
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal VERSAL_PLATFORM=versal_virt bl31
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal VERSAL_PLATFORM=versal_virt bl31
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```
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```
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To build TF-A for JTAG DCC console
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 VERSAL_CONSOLE=dcc
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```
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Xilinx Versal platform specific build options
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Xilinx Versal platform specific build options
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---------------------------------------------
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---------------------------------------------
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|
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@ -22,6 +22,12 @@ To build bl32 TSP you have to rebuild bl31 too:
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd bl31 bl32
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd bl31 bl32
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To build TF-A for JTAG DCC console:
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.. code:: bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 ZYNQMP_CONSOLE=dcc
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ZynqMP platform specific build options
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ZynqMP platform specific build options
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--------------------------------------
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--------------------------------------
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@ -0,0 +1,152 @@
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/*
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* Copyright (c) 2015-2021, Xilinx Inc.
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* Written by Michal Simek.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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||||||
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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||||||
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* Redistributions of source code must retain the above copyright notice, this
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||||||
|
* list of conditions and the following disclaimer.
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||||||
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*
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||||||
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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||||||
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* and/or other materials provided with the distribution.
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*
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||||||
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* Neither the name of ARM nor the names of its contributors may be used
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||||||
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* to endorse or promote products derived from this software without specific
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||||||
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* prior written permission.
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||||||
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*
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||||||
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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||||||
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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||||||
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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||||||
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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||||||
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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||||||
|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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||||||
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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||||||
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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||||||
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* POSSIBILITY OF SUCH DAMAGE.
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||||||
|
*/
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#include <errno.h>
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#include <stddef.h>
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#include <arch_helpers.h>
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#include <drivers/arm/dcc.h>
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#include <drivers/console.h>
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#include <drivers/delay_timer.h>
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#include <lib/mmio.h>
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/* DCC Status Bits */
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#define DCC_STATUS_RX BIT(30)
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#define DCC_STATUS_TX BIT(29)
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#define TIMEOUT_COUNT_US U(0x10624)
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struct dcc_console {
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struct console console;
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};
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static inline uint32_t __dcc_getstatus(void)
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{
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return read_mdccsr_el0();
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}
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static inline char __dcc_getchar(void)
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{
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char c;
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c = read_dbgdtrrx_el0();
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return c;
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}
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static inline void __dcc_putchar(char c)
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{
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/*
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* The typecast is to make absolutely certain that 'c' is
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* zero-extended.
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*/
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write_dbgdtrtx_el0((unsigned char)c);
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}
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static int32_t dcc_status_timeout(uint32_t mask)
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{
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const unsigned int timeout_count = TIMEOUT_COUNT_US;
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uint64_t timeout;
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unsigned int status;
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timeout = timeout_init_us(timeout_count);
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do {
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status = (__dcc_getstatus() & mask);
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if (timeout_elapsed(timeout)) {
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return -ETIMEDOUT;
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}
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} while ((status != 0U));
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return 0;
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}
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static int32_t dcc_console_putc(int32_t ch, struct console *console)
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{
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unsigned int status;
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status = dcc_status_timeout(DCC_STATUS_TX);
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if (status != 0U) {
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return status;
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}
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__dcc_putchar(ch);
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||||||
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return ch;
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}
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||||||
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static int32_t dcc_console_getc(struct console *console)
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{
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unsigned int status;
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status = dcc_status_timeout(DCC_STATUS_RX);
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if (status != 0U) {
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return status;
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||||||
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}
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||||||
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||||||
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return __dcc_getchar();
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}
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||||||
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int32_t dcc_console_init(unsigned long base_addr, uint32_t uart_clk,
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uint32_t baud_rate)
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{
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return 0; /* No init needed */
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||||||
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}
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||||||
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/**
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* dcc_console_flush() - Function to force a write of all buffered data
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* that hasn't been output.
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* @console Console struct
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*
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*/
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static void dcc_console_flush(struct console *console)
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{
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unsigned int status;
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status = dcc_status_timeout(DCC_STATUS_TX);
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if (status != 0U) {
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return;
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}
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}
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static struct dcc_console dcc_console = {
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.console = {
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.flags = CONSOLE_FLAG_BOOT |
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CONSOLE_FLAG_RUNTIME,
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.putc = dcc_console_putc,
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.getc = dcc_console_getc,
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.flush = dcc_console_flush,
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},
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};
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int console_dcc_register(void)
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{
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return console_register(&dcc_console.console);
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}
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@ -260,6 +260,9 @@ DEFINE_SYSREG_RW_FUNCS(spsr_el3)
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DEFINE_SYSREG_RW_FUNCS(elr_el1)
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DEFINE_SYSREG_RW_FUNCS(elr_el1)
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DEFINE_SYSREG_RW_FUNCS(elr_el2)
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DEFINE_SYSREG_RW_FUNCS(elr_el2)
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DEFINE_SYSREG_RW_FUNCS(elr_el3)
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DEFINE_SYSREG_RW_FUNCS(elr_el3)
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DEFINE_SYSREG_RW_FUNCS(mdccsr_el0)
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DEFINE_SYSREG_RW_FUNCS(dbgdtrrx_el0)
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DEFINE_SYSREG_RW_FUNCS(dbgdtrtx_el0)
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||||||
DEFINE_SYSOP_FUNC(wfi)
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DEFINE_SYSOP_FUNC(wfi)
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||||||
DEFINE_SYSOP_FUNC(wfe)
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DEFINE_SYSOP_FUNC(wfe)
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||||||
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@ -0,0 +1,19 @@
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||||||
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/*
|
||||||
|
* Copyright (c) 2021, Xilinx Inc.
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||||||
|
*
|
||||||
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* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
*/
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||||||
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||||||
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#ifndef DCC_H
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|
#define DCC_H
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||||||
|
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||||||
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#include <stdint.h>
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||||||
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#include <drivers/console.h>
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||||||
|
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||||||
|
/*
|
||||||
|
* Initialize a new dcc console instance and register it with the console
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||||||
|
* framework.
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||||||
|
*/
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||||||
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int console_dcc_register(void);
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||||||
|
#endif /* DCC */
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|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
|
* Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: BSD-3-Clause
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
*/
|
*/
|
||||||
|
@ -11,6 +11,7 @@
|
||||||
#include <bl31/bl31.h>
|
#include <bl31/bl31.h>
|
||||||
#include <common/bl_common.h>
|
#include <common/bl_common.h>
|
||||||
#include <common/debug.h>
|
#include <common/debug.h>
|
||||||
|
#include <drivers/arm/dcc.h>
|
||||||
#include <drivers/arm/pl011.h>
|
#include <drivers/arm/pl011.h>
|
||||||
#include <drivers/console.h>
|
#include <drivers/console.h>
|
||||||
#include <lib/mmio.h>
|
#include <lib/mmio.h>
|
||||||
|
@ -22,7 +23,6 @@
|
||||||
|
|
||||||
static entry_point_info_t bl32_image_ep_info;
|
static entry_point_info_t bl32_image_ep_info;
|
||||||
static entry_point_info_t bl33_image_ep_info;
|
static entry_point_info_t bl33_image_ep_info;
|
||||||
static console_t versal_runtime_console;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Return a pointer to the 'entry_point_info' structure of the next image for
|
* Return a pointer to the 'entry_point_info' structure of the next image for
|
||||||
|
@ -64,6 +64,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
|
||||||
{
|
{
|
||||||
uint64_t atf_handoff_addr;
|
uint64_t atf_handoff_addr;
|
||||||
|
|
||||||
|
if (VERSAL_CONSOLE_IS(pl011)) {
|
||||||
|
static console_t versal_runtime_console;
|
||||||
/* Initialize the console to provide early debug support */
|
/* Initialize the console to provide early debug support */
|
||||||
int rc = console_pl011_register(VERSAL_UART_BASE,
|
int rc = console_pl011_register(VERSAL_UART_BASE,
|
||||||
VERSAL_UART_CLOCK,
|
VERSAL_UART_CLOCK,
|
||||||
|
@ -75,7 +77,13 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
|
||||||
|
|
||||||
console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT |
|
console_set_scope(&versal_runtime_console, CONSOLE_FLAG_BOOT |
|
||||||
CONSOLE_FLAG_RUNTIME);
|
CONSOLE_FLAG_RUNTIME);
|
||||||
|
} else if (VERSAL_CONSOLE_IS(dcc)) {
|
||||||
|
/* Initialize the dcc console for debug */
|
||||||
|
int rc = console_dcc_register();
|
||||||
|
if (rc == 0) {
|
||||||
|
panic();
|
||||||
|
}
|
||||||
|
}
|
||||||
/* Initialize the platform config for future decision making */
|
/* Initialize the platform config for future decision making */
|
||||||
versal_config_setup();
|
versal_config_setup();
|
||||||
/* There are no parameters from BL2 if BL31 is a reset vector */
|
/* There are no parameters from BL2 if BL31 is a reset vector */
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
|
* Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: BSD-3-Clause
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
*/
|
*/
|
||||||
|
@ -67,7 +67,7 @@
|
||||||
#define VERSAL_UART0_BASE 0xFF000000
|
#define VERSAL_UART0_BASE 0xFF000000
|
||||||
#define VERSAL_UART1_BASE 0xFF010000
|
#define VERSAL_UART1_BASE 0xFF010000
|
||||||
|
|
||||||
#if VERSAL_CONSOLE_IS(pl011)
|
#if VERSAL_CONSOLE_IS(pl011) || VERSAL_CONSOLE_IS(dcc)
|
||||||
# define VERSAL_UART_BASE VERSAL_UART0_BASE
|
# define VERSAL_UART_BASE VERSAL_UART0_BASE
|
||||||
#elif VERSAL_CONSOLE_IS(pl011_1)
|
#elif VERSAL_CONSOLE_IS(pl011_1)
|
||||||
# define VERSAL_UART_BASE VERSAL_UART1_BASE
|
# define VERSAL_UART_BASE VERSAL_UART1_BASE
|
||||||
|
|
|
@ -1,4 +1,4 @@
|
||||||
# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
|
# Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
|
||||||
#
|
#
|
||||||
# SPDX-License-Identifier: BSD-3-Clause
|
# SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
|
||||||
|
@ -34,9 +34,6 @@ endif
|
||||||
VERSAL_PLATFORM ?= silicon
|
VERSAL_PLATFORM ?= silicon
|
||||||
$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
|
$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
|
||||||
|
|
||||||
VERSAL_CONSOLE ?= pl011
|
|
||||||
$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
|
|
||||||
|
|
||||||
PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
|
PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
|
||||||
-Iplat/xilinx/common/include/ \
|
-Iplat/xilinx/common/include/ \
|
||||||
-Iplat/xilinx/common/ipi_mailbox_service/ \
|
-Iplat/xilinx/common/ipi_mailbox_service/ \
|
||||||
|
@ -48,6 +45,7 @@ include drivers/arm/gic/v3/gicv3.mk
|
||||||
|
|
||||||
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
|
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
|
||||||
lib/xlat_tables/aarch64/xlat_tables.c \
|
lib/xlat_tables/aarch64/xlat_tables.c \
|
||||||
|
drivers/arm/dcc/dcc_console.c \
|
||||||
drivers/delay_timer/delay_timer.c \
|
drivers/delay_timer/delay_timer.c \
|
||||||
drivers/delay_timer/generic_delay_timer.c \
|
drivers/delay_timer/generic_delay_timer.c \
|
||||||
${GICV3_SOURCES} \
|
${GICV3_SOURCES} \
|
||||||
|
@ -59,6 +57,14 @@ PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
|
||||||
plat/xilinx/versal/aarch64/versal_helpers.S \
|
plat/xilinx/versal/aarch64/versal_helpers.S \
|
||||||
plat/xilinx/versal/aarch64/versal_common.c
|
plat/xilinx/versal/aarch64/versal_common.c
|
||||||
|
|
||||||
|
VERSAL_CONSOLE ?= pl011
|
||||||
|
ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc))
|
||||||
|
else
|
||||||
|
$(error "Please define VERSAL_CONSOLE")
|
||||||
|
endif
|
||||||
|
|
||||||
|
$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
|
||||||
|
|
||||||
BL31_SOURCES += drivers/arm/cci/cci.c \
|
BL31_SOURCES += drivers/arm/cci/cci.c \
|
||||||
lib/cpus/aarch64/cortex_a72.S \
|
lib/cpus/aarch64/cortex_a72.S \
|
||||||
plat/common/plat_psci_common.c \
|
plat/common/plat_psci_common.c \
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
|
* Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: BSD-3-Clause
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
*/
|
*/
|
||||||
|
@ -10,6 +10,7 @@
|
||||||
#include <bl31/bl31.h>
|
#include <bl31/bl31.h>
|
||||||
#include <common/bl_common.h>
|
#include <common/bl_common.h>
|
||||||
#include <common/debug.h>
|
#include <common/debug.h>
|
||||||
|
#include <drivers/arm/dcc.h>
|
||||||
#include <drivers/console.h>
|
#include <drivers/console.h>
|
||||||
#include <plat/arm/common/plat_arm.h>
|
#include <plat/arm/common/plat_arm.h>
|
||||||
#include <plat/common/platform.h>
|
#include <plat/common/platform.h>
|
||||||
|
@ -62,6 +63,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
|
||||||
u_register_t arg2, u_register_t arg3)
|
u_register_t arg2, u_register_t arg3)
|
||||||
{
|
{
|
||||||
uint64_t atf_handoff_addr;
|
uint64_t atf_handoff_addr;
|
||||||
|
|
||||||
|
if (ZYNQMP_CONSOLE_IS(cadence)) {
|
||||||
/* Register the console to provide early debug support */
|
/* Register the console to provide early debug support */
|
||||||
static console_t bl31_boot_console;
|
static console_t bl31_boot_console;
|
||||||
(void)console_cdns_register(ZYNQMP_UART_BASE,
|
(void)console_cdns_register(ZYNQMP_UART_BASE,
|
||||||
|
@ -70,7 +73,13 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
|
||||||
&bl31_boot_console);
|
&bl31_boot_console);
|
||||||
console_set_scope(&bl31_boot_console,
|
console_set_scope(&bl31_boot_console,
|
||||||
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
|
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
|
||||||
|
} else if (ZYNQMP_CONSOLE_IS(dcc)) {
|
||||||
|
/* Initialize the dcc console for debug */
|
||||||
|
int rc = console_dcc_register();
|
||||||
|
if (rc == 0) {
|
||||||
|
panic();
|
||||||
|
}
|
||||||
|
}
|
||||||
/* Initialize the platform config for future decision making */
|
/* Initialize the platform config for future decision making */
|
||||||
zynqmp_config_setup();
|
zynqmp_config_setup();
|
||||||
|
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
#
|
#
|
||||||
# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
|
# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
|
||||||
#
|
#
|
||||||
# SPDX-License-Identifier: BSD-3-Clause
|
# SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
|
||||||
|
@ -41,8 +41,6 @@ ifdef ZYNQMP_BL32_MEM_BASE
|
||||||
$(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
|
$(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
|
||||||
endif
|
endif
|
||||||
|
|
||||||
ZYNQMP_CONSOLE ?= cadence
|
|
||||||
$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
|
|
||||||
|
|
||||||
ifdef ZYNQMP_WDT_RESTART
|
ifdef ZYNQMP_WDT_RESTART
|
||||||
$(eval $(call add_define,ZYNQMP_WDT_RESTART))
|
$(eval $(call add_define,ZYNQMP_WDT_RESTART))
|
||||||
|
@ -64,6 +62,7 @@ include drivers/arm/gic/v2/gicv2.mk
|
||||||
|
|
||||||
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
|
PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
|
||||||
lib/xlat_tables/aarch64/xlat_tables.c \
|
lib/xlat_tables/aarch64/xlat_tables.c \
|
||||||
|
drivers/arm/dcc/dcc_console.c \
|
||||||
drivers/delay_timer/delay_timer.c \
|
drivers/delay_timer/delay_timer.c \
|
||||||
drivers/delay_timer/generic_delay_timer.c \
|
drivers/delay_timer/generic_delay_timer.c \
|
||||||
${GICV2_SOURCES} \
|
${GICV2_SOURCES} \
|
||||||
|
@ -78,6 +77,13 @@ PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \
|
||||||
plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \
|
plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \
|
||||||
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
|
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
|
||||||
|
|
||||||
|
ZYNQMP_CONSOLE ?= cadence
|
||||||
|
ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc))
|
||||||
|
else
|
||||||
|
$(error "Please define ZYNQMP_CONSOLE")
|
||||||
|
endif
|
||||||
|
$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
|
||||||
|
|
||||||
BL31_SOURCES += drivers/arm/cci/cci.c \
|
BL31_SOURCES += drivers/arm/cci/cci.c \
|
||||||
lib/cpus/aarch64/aem_generic.S \
|
lib/cpus/aarch64/aem_generic.S \
|
||||||
lib/cpus/aarch64/cortex_a53.S \
|
lib/cpus/aarch64/cortex_a53.S \
|
||||||
|
|
Loading…
Reference in New Issue