Merge "doc: Correct CPACR.FPEN usage" into integration
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@ -369,7 +369,7 @@ Architectural initialization
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For AArch64, BL2 performs the minimal architectural initialization required
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for subsequent stages of TF-A and normal world software. EL1 and EL0 are given
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access to Floating Point and Advanced SIMD registers by clearing the
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access to Floating Point and Advanced SIMD registers by setting the
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``CPACR.FPEN`` bits.
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For AArch32, the minimal architectural initialization required for subsequent
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