Merge "doc: Correct CPACR.FPEN usage" into integration

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Mark Dykes 2020-09-15 16:44:09 +00:00 committed by TrustedFirmware Code Review
commit 51ca09179d
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@ -369,7 +369,7 @@ Architectural initialization
For AArch64, BL2 performs the minimal architectural initialization required
for subsequent stages of TF-A and normal world software. EL1 and EL0 are given
access to Floating Point and Advanced SIMD registers by clearing the
access to Floating Point and Advanced SIMD registers by setting the
``CPACR.FPEN`` bits.
For AArch32, the minimal architectural initialization required for subsequent