Fix coverity defects found on the FPGA port.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I397b642eff8a09b201f497f8d2ba39e2460c0dba
This commit is contained in:
Javier Almansa Sobrino 2020-04-02 12:36:16 +01:00
parent 61903ad777
commit 535c824e38
1 changed files with 5 additions and 1 deletions

View File

@ -41,9 +41,13 @@ uintptr_t fpga_sec_entrypoint;
*/
static int fpga_pwr_domain_on(u_register_t mpidr)
{
unsigned int pos = plat_core_pos_by_mpidr(mpidr);
int pos = plat_core_pos_by_mpidr(mpidr);
unsigned long current_mpidr = read_mpidr_el1();
if (pos < 0) {
panic();
}
if (mpidr == current_mpidr) {
return PSCI_E_ALREADY_ON;
}