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Merge "fix(cpu): correct Demeter CPU name" into integration

This commit is contained in:
Manish Pandey 2021-10-21 21:53:19 +02:00 committed by TrustedFirmware Code Review
parent 0172ac30ff 4cb576a0c5
commit 53602a1393
3 changed files with 31 additions and 31 deletions
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14
include/lib/cpus/aarch64/cortex_demeter.h → include/lib/cpus/aarch64/neoverse_demeter.h
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@ -4,20 +4,20 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef CORTEX_DEMETER_H
#define CORTEX_DEMETER_H
#ifndef NEOVERSE_DEMETER_H
#define NEOVERSE_DEMETER_H
#define CORTEX_DEMETER_MIDR U(0x410FD4F0)
#define NEOVERSE_DEMETER_MIDR U(0x410FD4F0)
/*******************************************************************************
* CPU Extended Control register specific definitions
******************************************************************************/
#define CORTEX_DEMETER_CPUECTLR_EL1 S3_0_C15_C1_4
#define NEOVERSE_DEMETER_CPUECTLR_EL1 S3_0_C15_C1_4
/*******************************************************************************
* CPU Power Control register specific definitions
******************************************************************************/
#define CORTEX_DEMETER_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define CORTEX_DEMETER_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
#define NEOVERSE_DEMETER_CPUPWRCTLR_EL1 S3_0_C15_C2_7
#define NEOVERSE_DEMETER_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
#endif /* CORTEX_DEMETER_H */
#endif /* NEOVERSE_DEMETER_H */

46
lib/cpus/aarch64/cortex_demeter.S → lib/cpus/aarch64/neoverse_demeter.S
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@ -7,54 +7,54 @@
#include <arch.h>
#include <asm_macros.S>
#include <common/bl_common.h>
#include <cortex_demeter.h>
#include <neoverse_demeter.h>
#include <cpu_macros.S>
#include <plat_macros.S>
/* Hardware handled coherency */
#if HW_ASSISTED_COHERENCY == 0
#error "Cortex Demeter must be compiled with HW_ASSISTED_COHERENCY enabled"
#error "Neoverse Demeter must be compiled with HW_ASSISTED_COHERENCY enabled"
#endif
/* 64-bit only core */
#if CTX_INCLUDE_AARCH32_REGS == 1
#error "Cortex Demeter supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#error "Neoverse Demeter supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#endif
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
* ----------------------------------------------------
*/
func cortex_demeter_core_pwr_dwn
func neoverse_demeter_core_pwr_dwn
/* ---------------------------------------------------
* Enable CPU power down bit in power control register
* ---------------------------------------------------
*/
mrs x0, CORTEX_DEMETER_CPUPWRCTLR_EL1
orr x0, x0, #CORTEX_DEMETER_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
msr CORTEX_DEMETER_CPUPWRCTLR_EL1, x0
mrs x0, NEOVERSE_DEMETER_CPUPWRCTLR_EL1
orr x0, x0, #NEOVERSE_DEMETER_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
msr NEOVERSE_DEMETER_CPUPWRCTLR_EL1, x0
isb
ret
endfunc cortex_demeter_core_pwr_dwn
endfunc neoverse_demeter_core_pwr_dwn
#if REPORT_ERRATA
/*
* Errata printing function for Cortex Demeter. Must follow AAPCS.
* Errata printing function for Neoverse Demeter. Must follow AAPCS.
*/
func cortex_demeter_errata_report
func neoverse_demeter_errata_report
ret
endfunc cortex_demeter_errata_report
endfunc neoverse_demeter_errata_report
#endif
func cortex_demeter_reset_func
func neoverse_demeter_reset_func
/* Disable speculative loads */
msr SSBS, xzr
isb
ret
endfunc cortex_demeter_reset_func
endfunc neoverse_demeter_reset_func
/* ---------------------------------------------
* This function provides Cortex Demeter-
* This function provides Neoverse Demeter-
* specific register information for crash
* reporting. It needs to return with x6
* pointing to a list of register names in ascii
@ -62,16 +62,16 @@ endfunc cortex_demeter_reset_func
* reported.
* ---------------------------------------------
*/
.section .rodata.cortex_demeter_regs, "aS"
cortex_demeter_regs: /* The ascii list of register names to be reported */
.section .rodata.neoverse_demeter_regs, "aS"
neoverse_demeter_regs: /* The ascii list of register names to be reported */
.asciz "cpuectlr_el1", ""
func cortex_demeter_cpu_reg_dump
adr x6, cortex_demeter_regs
mrs x8, CORTEX_DEMETER_CPUECTLR_EL1
func neoverse_demeter_cpu_reg_dump
adr x6, neoverse_demeter_regs
mrs x8, NEOVERSE_DEMETER_CPUECTLR_EL1
ret
endfunc cortex_demeter_cpu_reg_dump
endfunc neoverse_demeter_cpu_reg_dump
declare_cpu_ops cortex_demeter, CORTEX_DEMETER_MIDR, \
cortex_demeter_reset_func, \
cortex_demeter_core_pwr_dwn
declare_cpu_ops neoverse_demeter, NEOVERSE_DEMETER_MIDR, \
neoverse_demeter_reset_func, \
neoverse_demeter_core_pwr_dwn

2
plat/arm/board/fvp/platform.mk
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@ -130,12 +130,12 @@ else
lib/cpus/aarch64/neoverse_n2.S \
lib/cpus/aarch64/neoverse_e1.S \
lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/neoverse_demeter.S \
lib/cpus/aarch64/cortex_a78_ae.S \
lib/cpus/aarch64/cortex_a510.S \
lib/cpus/aarch64/cortex_a710.S \
lib/cpus/aarch64/cortex_makalu.S \
lib/cpus/aarch64/cortex_makalu_elp_arm.S \
lib/cpus/aarch64/cortex_demeter.S \
lib/cpus/aarch64/cortex_a65.S \
lib/cpus/aarch64/cortex_a65ae.S \
lib/cpus/aarch64/cortex_a78c.S \