From 53ff5c79b4861b46496c4d4ee0bd7361eb3b4bf2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 30 Dec 2018 17:21:39 +0100 Subject: [PATCH] rcar_gen3: plat: Fix cache line size The CPU has cache line size of 64 Bytes, fix the cache line size. Signed-off-by: Marek Vasut --- plat/renesas/rcar/include/platform_def.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/renesas/rcar/include/platform_def.h b/plat/renesas/rcar/include/platform_def.h index 20fd71230..57399a248 100644 --- a/plat/renesas/rcar/include/platform_def.h +++ b/plat/renesas/rcar/include/platform_def.h @@ -79,7 +79,7 @@ * Cortex-A53 * L1:I/32KB(16KBx2way) D/32KB(8KBx4way) L2:512KB(32KBx16way) */ -#define PLATFORM_CACHE_LINE_SIZE 128 +#define PLATFORM_CACHE_LINE_SIZE 64 #define PLATFORM_CLUSTER_COUNT U(2) #define PLATFORM_CLUSTER0_CORE_COUNT U(4) #define PLATFORM_CLUSTER1_CORE_COUNT U(4)