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Tegra: compile PMC driver for Tegra132/Tegra210 platforms 

The PMC driver is used only by Tegra210 and Tegra132 platforms. This
patch removes pmc.c from the common makefile and moves it to the
platform specific makefiles.

As a result, the PMC code from common code has been moved to Tegra132
and Tegra210 platform ports.

Change-Id: Ia157f70e776b3eff3c12eb8f0f02d30102670a98
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Varun Wadekar 2018-05-17 11:10:13 -07:00
parent f561a17967
commit 57c539f929
6 changed files with 18 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
plat/nvidia/tegra/common/tegra_common.mk
View File

@ -25,7 +25,6 @@ BL31_SOURCES += drivers/delay_timer/delay_timer.c \
plat/common/aarch64/crash_console_helpers.S \
${TEGRA_GICv2_SOURCES} \
${COMMON_DIR}/aarch64/tegra_helpers.S \
${COMMON_DIR}/drivers/pmc/pmc.c \
${COMMON_DIR}/lib/debug/profiler.c \
${COMMON_DIR}/tegra_bl31_setup.c \
${COMMON_DIR}/tegra_delay_timer.c \

8
plat/nvidia/tegra/common/tegra_pm.c
View File

@ -221,10 +221,10 @@ __dead2 void tegra_system_reset(void)
/* per-SoC system reset handler */
(void)tegra_soc_prepare_system_reset();
/*
* Program the PMC in order to restart the system.
*/
tegra_pmc_system_reset();
/* wait for the system to reset */
for (;;) {
;
}
}
/*******************************************************************************

5
plat/nvidia/tegra/soc/t132/plat_psci_handlers.c
View File

@ -193,6 +193,11 @@ int tegra_soc_prepare_system_reset(void)
/* Wait 1 ms to make sure clock source/device logic is stabilized. */
mdelay(1);
/*
* Program the PMC in order to restart the system.
*/
tegra_pmc_system_reset();
return PSCI_E_SUCCESS;
}

2
plat/nvidia/tegra/soc/t132/platform_t132.mk
View File

@ -1,5 +1,6 @@
#
# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -23,6 +24,7 @@ BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \
lib/cpus/aarch64/denver.S \
${COMMON_DIR}/drivers/flowctrl/flowctrl.c \
${COMMON_DIR}/drivers/memctrl/memctrl_v1.c \
${COMMON_DIR}/drivers/pmc/pmc.c \
${SOC_DIR}/plat_psci_handlers.c \
${SOC_DIR}/plat_sip_calls.c \
${SOC_DIR}/plat_setup.c \

5
plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
View File

@ -579,6 +579,11 @@ int tegra_soc_prepare_system_reset(void)
/* Wait 1 ms to make sure clock source/device logic is stabilized. */
mdelay(1);
/*
* Program the PMC in order to restart the system.
*/
tegra_pmc_system_reset();
return PSCI_E_SUCCESS;
}

2
plat/nvidia/tegra/soc/t210/platform_t210.mk
View File

@ -1,5 +1,6 @@
#
# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -33,6 +34,7 @@ BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \
${COMMON_DIR}/drivers/bpmp/bpmp.c \
${COMMON_DIR}/drivers/flowctrl/flowctrl.c \
${COMMON_DIR}/drivers/memctrl/memctrl_v1.c \
${COMMON_DIR}/drivers/pmc/pmc.c \
${SOC_DIR}/plat_psci_handlers.c \
${SOC_DIR}/plat_setup.c \
${SOC_DIR}/drivers/se/security_engine.c \