diff --git a/plat/intel/soc/common/include/socfpga_fcs.h b/plat/intel/soc/common/include/socfpga_fcs.h index f5cab14c5..3fd71c130 100644 --- a/plat/intel/soc/common/include/socfpga_fcs.h +++ b/plat/intel/soc/common/include/socfpga_fcs.h @@ -9,76 +9,77 @@ /* FCS Definitions */ -#define FCS_RANDOM_WORD_SIZE 8U -#define FCS_PROV_DATA_WORD_SIZE 44U -#define FCS_SHA384_WORD_SIZE 12U +#define FCS_RANDOM_WORD_SIZE 8U +#define FCS_PROV_DATA_WORD_SIZE 44U +#define FCS_SHA384_WORD_SIZE 12U -#define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U) -#define FCS_RANDOM_EXT_MAX_WORD_SIZE 1020U -#define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U) -#define FCS_SHA384_BYTE_SIZE (FCS_SHA384_WORD_SIZE * 4U) +#define FCS_RANDOM_BYTE_SIZE (FCS_RANDOM_WORD_SIZE * 4U) +#define FCS_RANDOM_EXT_MAX_WORD_SIZE 1020U +#define FCS_PROV_DATA_BYTE_SIZE (FCS_PROV_DATA_WORD_SIZE * 4U) +#define FCS_SHA384_BYTE_SIZE (FCS_SHA384_WORD_SIZE * 4U) -#define FCS_RANDOM_EXT_OFFSET 3 +#define FCS_RANDOM_EXT_OFFSET 3 -#define FCS_MODE_DECRYPT 0x0 -#define FCS_MODE_ENCRYPT 0x1 -#define FCS_ENCRYPTION_DATA_0 0x10100 -#define FCS_DECRYPTION_DATA_0 0x10102 -#define FCS_OWNER_ID_OFFSET 0xC -#define FCS_CRYPTION_CRYPTO_HEADER 0x07000000 -#define FCS_CRYPTION_RESP_WORD_SIZE 4U -#define FCS_CRYPTION_RESP_SIZE_OFFSET 3U +#define FCS_MODE_DECRYPT 0x0 +#define FCS_MODE_ENCRYPT 0x1 +#define FCS_ENCRYPTION_DATA_0 0x10100 +#define FCS_DECRYPTION_DATA_0 0x10102 +#define FCS_OWNER_ID_OFFSET 0xC +#define FCS_CRYPTION_CRYPTO_HEADER 0x07000000 +#define FCS_CRYPTION_RESP_WORD_SIZE 4U +#define FCS_CRYPTION_RESP_SIZE_OFFSET 3U -#define PSGSIGMA_TEARDOWN_MAGIC 0xB852E2A4 -#define PSGSIGMA_SESSION_ID_ONE 0x1 -#define PSGSIGMA_UNKNOWN_SESSION 0xFFFFFFFF +#define PSGSIGMA_TEARDOWN_MAGIC 0xB852E2A4 +#define PSGSIGMA_SESSION_ID_ONE 0x1 +#define PSGSIGMA_UNKNOWN_SESSION 0xFFFFFFFF -#define RESERVED_AS_ZERO 0x0 +#define RESERVED_AS_ZERO 0x0 /* FCS Single cert */ -#define FCS_BIG_CNTR_SEL 0x1 +#define FCS_BIG_CNTR_SEL 0x1 -#define FCS_SVN_CNTR_0_SEL 0x2 -#define FCS_SVN_CNTR_1_SEL 0x3 -#define FCS_SVN_CNTR_2_SEL 0x4 -#define FCS_SVN_CNTR_3_SEL 0x5 +#define FCS_SVN_CNTR_0_SEL 0x2 +#define FCS_SVN_CNTR_1_SEL 0x3 +#define FCS_SVN_CNTR_2_SEL 0x4 +#define FCS_SVN_CNTR_3_SEL 0x5 -#define FCS_BIG_CNTR_VAL_MAX 495U -#define FCS_SVN_CNTR_VAL_MAX 64U +#define FCS_BIG_CNTR_VAL_MAX 495U +#define FCS_SVN_CNTR_VAL_MAX 64U /* FCS Attestation Cert Request Parameter */ -#define FCS_ALIAS_CERT 0x01 -#define FCS_DEV_ID_SELF_SIGN_CERT 0x02 -#define FCS_DEV_ID_ENROLL_CERT 0x04 -#define FCS_ENROLL_SELF_SIGN_CERT 0x08 -#define FCS_PLAT_KEY_CERT 0x10 +#define FCS_ALIAS_CERT 0x01 +#define FCS_DEV_ID_SELF_SIGN_CERT 0x02 +#define FCS_DEV_ID_ENROLL_CERT 0x04 +#define FCS_ENROLL_SELF_SIGN_CERT 0x08 +#define FCS_PLAT_KEY_CERT 0x10 /* FCS Crypto Service */ -#define FCS_CS_KEY_OBJ_MAX_WORD_SIZE 88U -#define FCS_CS_KEY_INFO_MAX_WORD_SIZE 36U -#define FCS_CS_KEY_RESP_STATUS_MASK 0xFF -#define FCS_CS_KEY_RESP_STATUS_OFFSET 16U +#define FCS_CS_KEY_OBJ_MAX_WORD_SIZE 88U +#define FCS_CS_KEY_INFO_MAX_WORD_SIZE 36U +#define FCS_CS_KEY_RESP_STATUS_MASK 0xFF +#define FCS_CS_KEY_RESP_STATUS_OFFSET 16U -#define FCS_CS_FIELD_SIZE_MASK 0xFFFF -#define FCS_CS_FIELD_FLAG_OFFSET 24 -#define FCS_CS_FIELD_FLAG_INIT BIT(0) -#define FCS_CS_FIELD_FLAG_UPDATE BIT(1) -#define FCS_CS_FIELD_FLAG_FINALIZE BIT(2) +#define FCS_CS_FIELD_SIZE_MASK 0xFFFF +#define FCS_CS_FIELD_FLAG_OFFSET 24 +#define FCS_CS_FIELD_FLAG_INIT BIT(0) +#define FCS_CS_FIELD_FLAG_UPDATE BIT(1) +#define FCS_CS_FIELD_FLAG_FINALIZE BIT(2) -#define FCS_AES_MAX_DATA_SIZE 0x10000000 /* 256 MB */ -#define FCS_AES_MIN_DATA_SIZE 0x20 /* 32 Byte */ -#define FCS_AES_CMD_MAX_WORD_SIZE 15U +#define FCS_AES_MAX_DATA_SIZE 0x10000000 /* 256 MB */ +#define FCS_AES_MIN_DATA_SIZE 0x20 /* 32 Byte */ +#define FCS_AES_CMD_MAX_WORD_SIZE 15U -#define FCS_GET_DIGEST_CMD_MAX_WORD_SIZE 7U -#define FCS_GET_DIGEST_RESP_MAX_WORD_SIZE 19U -#define FCS_MAC_VERIFY_CMD_MAX_WORD_SIZE 23U -#define FCS_MAC_VERIFY_RESP_MAX_WORD_SIZE 4U -#define FCS_SHA_HMAC_CRYPTO_PARAM_SIZE_OFFSET 8U +#define FCS_GET_DIGEST_CMD_MAX_WORD_SIZE 7U +#define FCS_GET_DIGEST_RESP_MAX_WORD_SIZE 19U +#define FCS_MAC_VERIFY_CMD_MAX_WORD_SIZE 23U +#define FCS_MAC_VERIFY_RESP_MAX_WORD_SIZE 4U +#define FCS_SHA_HMAC_CRYPTO_PARAM_SIZE_OFFSET 8U -#define FCS_ECDSA_GET_PUBKEY_MAX_WORD_SIZE 5U -#define FCS_ECDSA_SHA2_DATA_SIGN_CMD_MAX_WORD_SIZE 7U +#define FCS_ECDSA_GET_PUBKEY_MAX_WORD_SIZE 5U +#define FCS_ECDSA_SHA2_DATA_SIGN_CMD_MAX_WORD_SIZE 7U +#define FCS_ECDSA_SHA2_DATA_SIG_VERIFY_CMD_MAX_WORD_SIZE 43U /* FCS Payload Structure */ typedef struct fcs_rng_payload_t { uint32_t session_id; @@ -246,6 +247,16 @@ int intel_fcs_ecdsa_sha2_data_sign_finalize(uint32_t session_id, uint32_t src_size, uint64_t dst_addr, uint32_t *dst_size, uint32_t *mbox_error); +int intel_fcs_ecdsa_sha2_data_sig_verify_init(uint32_t session_id, + uint32_t context_id, uint32_t key_id, + uint32_t param_size, uint64_t param_data, + uint32_t *mbox_error); +int intel_fcs_ecdsa_sha2_data_sig_verify_finalize(uint32_t session_id, + uint32_t context_id, uint32_t src_addr, + uint32_t src_size, uint64_t dst_addr, + uint32_t *dst_size, uint32_t data_size, + uint32_t *mbox_error); + int intel_fcs_ecdsa_get_pubkey_init(uint32_t session_id, uint32_t context_id, uint32_t key_id, uint32_t param_size, uint64_t param_data, uint32_t *mbox_error); diff --git a/plat/intel/soc/common/include/socfpga_mailbox.h b/plat/intel/soc/common/include/socfpga_mailbox.h index e5e1d140f..042532cb3 100644 --- a/plat/intel/soc/common/include/socfpga_mailbox.h +++ b/plat/intel/soc/common/include/socfpga_mailbox.h @@ -79,6 +79,7 @@ #define MBOX_FCS_GET_DIGEST_REQ 0x82 #define MBOX_FCS_MAC_VERIFY_REQ 0x83 #define MBOX_FCS_ECDSA_SHA2_DATA_SIGN_REQ 0x85 +#define MBOX_FCS_ECDSA_SHA2_DATA_SIGN_VERIFY 0x87 #define MBOX_FCS_ECDSA_GET_PUBKEY 0x88 #define MBOX_FCS_OPEN_CS_SESSION 0xA0 #define MBOX_FCS_CLOSE_CS_SESSION 0xA1 diff --git a/plat/intel/soc/common/include/socfpga_sip_svc.h b/plat/intel/soc/common/include/socfpga_sip_svc.h index 14be92b45..445fd646b 100644 --- a/plat/intel/soc/common/include/socfpga_sip_svc.h +++ b/plat/intel/soc/common/include/socfpga_sip_svc.h @@ -9,30 +9,30 @@ /* SiP status response */ -#define INTEL_SIP_SMC_STATUS_OK 0 -#define INTEL_SIP_SMC_STATUS_BUSY 0x1 -#define INTEL_SIP_SMC_STATUS_REJECTED 0x2 -#define INTEL_SIP_SMC_STATUS_NO_RESPONSE 0x3 -#define INTEL_SIP_SMC_STATUS_ERROR 0x4 -#define INTEL_SIP_SMC_RSU_ERROR 0x7 +#define INTEL_SIP_SMC_STATUS_OK 0 +#define INTEL_SIP_SMC_STATUS_BUSY 0x1 +#define INTEL_SIP_SMC_STATUS_REJECTED 0x2 +#define INTEL_SIP_SMC_STATUS_NO_RESPONSE 0x3 +#define INTEL_SIP_SMC_STATUS_ERROR 0x4 +#define INTEL_SIP_SMC_RSU_ERROR 0x7 /* SiP mailbox error code */ -#define GENERIC_RESPONSE_ERROR 0x3FF +#define GENERIC_RESPONSE_ERROR 0x3FF /* SMC SiP service function identifier */ /* FPGA Reconfig */ -#define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001 -#define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002 -#define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003 -#define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004 -#define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005 +#define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001 +#define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002 +#define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003 +#define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004 +#define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005 /* FPGA Bitstream Flag */ -#define FLAG_PARTIAL_CONFIG BIT(0) -#define FLAG_AUTHENTICATION BIT(1) -#define CONFIG_TEST_FLAG(_flag, _type) (((flag) & FLAG_##_type) \ - == FLAG_##_type) +#define FLAG_PARTIAL_CONFIG BIT(0) +#define FLAG_AUTHENTICATION BIT(1) +#define CONFIG_TEST_FLAG(_flag, _type) (((flag) & FLAG_##_type) \ + == FLAG_##_type) /* Secure Register Access */ #define INTEL_SIP_SMC_REG_READ 0xC2000007 @@ -40,92 +40,92 @@ #define INTEL_SIP_SMC_REG_UPDATE 0xC2000009 /* Remote System Update */ -#define INTEL_SIP_SMC_RSU_STATUS 0xC200000B -#define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C -#define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E -#define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F -#define INTEL_SIP_SMC_RSU_DCMF_VERSION 0xC2000010 -#define INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION 0xC2000011 -#define INTEL_SIP_SMC_RSU_MAX_RETRY 0xC2000012 -#define INTEL_SIP_SMC_RSU_COPY_MAX_RETRY 0xC2000013 -#define INTEL_SIP_SMC_RSU_DCMF_STATUS 0xC2000014 -#define INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS 0xC2000015 +#define INTEL_SIP_SMC_RSU_STATUS 0xC200000B +#define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C +#define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E +#define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F +#define INTEL_SIP_SMC_RSU_DCMF_VERSION 0xC2000010 +#define INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION 0xC2000011 +#define INTEL_SIP_SMC_RSU_MAX_RETRY 0xC2000012 +#define INTEL_SIP_SMC_RSU_COPY_MAX_RETRY 0xC2000013 +#define INTEL_SIP_SMC_RSU_DCMF_STATUS 0xC2000014 +#define INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS 0xC2000015 /* Hardware monitor */ -#define INTEL_SIP_SMC_HWMON_READTEMP 0xC2000020 -#define INTEL_SIP_SMC_HWMON_READVOLT 0xC2000021 -#define TEMP_CHANNEL_MAX (1 << 15) -#define VOLT_CHANNEL_MAX (1 << 15) +#define INTEL_SIP_SMC_HWMON_READTEMP 0xC2000020 +#define INTEL_SIP_SMC_HWMON_READVOLT 0xC2000021 +#define TEMP_CHANNEL_MAX (1 << 15) +#define VOLT_CHANNEL_MAX (1 << 15) /* ECC */ -#define INTEL_SIP_SMC_ECC_DBE 0xC200000D +#define INTEL_SIP_SMC_ECC_DBE 0xC200000D /* Generic Command */ -#define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 -#define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040 +#define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E +#define INTEL_SIP_SMC_FIRMWARE_VERSION 0xC200001F +#define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 +#define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040 -/* Send Mailbox Command */ -#define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E -#define INTEL_SIP_SMC_FIRMWARE_VERSION 0xC200001F -#define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 - -#define SERVICE_COMPLETED_MODE_ASYNC 0x00004F4E +#define SERVICE_COMPLETED_MODE_ASYNC 0x00004F4E /* Mailbox Command */ -#define INTEL_SIP_SMC_GET_USERCODE 0xC200003D +#define INTEL_SIP_SMC_GET_USERCODE 0xC200003D /* FPGA Crypto Services */ -#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER 0xC200005A -#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT 0x4200008F -#define INTEL_SIP_SMC_FCS_CRYPTION 0x4200005B -#define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090 -#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D -#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E -#define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F -#define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064 -#define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065 -#define INTEL_SIP_SMC_FCS_ATTESTATION_SUBKEY 0xC2000066 -#define INTEL_SIP_SMC_FCS_ATTESTATION_MEASUREMENTS 0xC2000067 -#define INTEL_SIP_SMC_FCS_GET_ATTESTATION_CERT 0xC2000068 -#define INTEL_SIP_SMC_FCS_CREATE_CERT_ON_RELOAD 0xC2000069 -#define INTEL_SIP_SMC_FCS_OPEN_CS_SESSION 0xC200006E -#define INTEL_SIP_SMC_FCS_CLOSE_CS_SESSION 0xC200006F -#define INTEL_SIP_SMC_FCS_IMPORT_CS_KEY 0x42000070 -#define INTEL_SIP_SMC_FCS_EXPORT_CS_KEY 0xC2000071 -#define INTEL_SIP_SMC_FCS_REMOVE_CS_KEY 0xC2000072 -#define INTEL_SIP_SMC_FCS_GET_CS_KEY_INFO 0xC2000073 -#define INTEL_SIP_SMC_FCS_AES_CRYPT_INIT 0xC2000074 -#define INTEL_SIP_SMC_FCS_AES_CRYPT_FINALIZE 0x42000076 -#define INTEL_SIP_SMC_FCS_GET_DIGEST_INIT 0xC2000077 -#define INTEL_SIP_SMC_FCS_GET_DIGEST_FINALIZE 0xC2000079 -#define INTEL_SIP_SMC_FCS_MAC_VERIFY_INIT 0xC200007A -#define INTEL_SIP_SMC_FCS_MAC_VERIFY_FINALIZE 0xC200007C -#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT 0xC2000080 -#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE 0xC2000082 -#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT 0xC2000089 -#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_FINALIZE 0xC200008B +#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER 0xC200005A +#define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT 0x4200008F +#define INTEL_SIP_SMC_FCS_CRYPTION 0x4200005B +#define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090 +#define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D +#define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E +#define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F +#define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064 +#define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065 +#define INTEL_SIP_SMC_FCS_ATTESTATION_SUBKEY 0xC2000066 +#define INTEL_SIP_SMC_FCS_ATTESTATION_MEASUREMENTS 0xC2000067 +#define INTEL_SIP_SMC_FCS_GET_ATTESTATION_CERT 0xC2000068 +#define INTEL_SIP_SMC_FCS_CREATE_CERT_ON_RELOAD 0xC2000069 +#define INTEL_SIP_SMC_FCS_OPEN_CS_SESSION 0xC200006E +#define INTEL_SIP_SMC_FCS_CLOSE_CS_SESSION 0xC200006F +#define INTEL_SIP_SMC_FCS_IMPORT_CS_KEY 0x42000070 +#define INTEL_SIP_SMC_FCS_EXPORT_CS_KEY 0xC2000071 +#define INTEL_SIP_SMC_FCS_REMOVE_CS_KEY 0xC2000072 +#define INTEL_SIP_SMC_FCS_GET_CS_KEY_INFO 0xC2000073 +#define INTEL_SIP_SMC_FCS_AES_CRYPT_INIT 0xC2000074 +#define INTEL_SIP_SMC_FCS_AES_CRYPT_FINALIZE 0x42000076 +#define INTEL_SIP_SMC_FCS_GET_DIGEST_INIT 0xC2000077 +#define INTEL_SIP_SMC_FCS_GET_DIGEST_FINALIZE 0xC2000079 +#define INTEL_SIP_SMC_FCS_MAC_VERIFY_INIT 0xC200007A +#define INTEL_SIP_SMC_FCS_MAC_VERIFY_FINALIZE 0xC200007C +#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT 0xC2000080 +#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE 0xC2000082 +#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT 0xC2000086 +#define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE 0xC2000088 +#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT 0xC2000089 +#define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_FINALIZE 0xC200008B + +#define INTEL_SIP_SMC_FCS_SHA_MODE_MASK 0xF +#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_MASK 0xF +#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_OFFSET 4U +#define INTEL_SIP_SMC_FCS_ECC_ALGO_MASK 0xF -#define INTEL_SIP_SMC_FCS_SHA_MODE_MASK 0xF -#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_MASK 0xF -#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_OFFSET 4U -#define INTEL_SIP_SMC_FCS_ECC_ALGO_MASK 0xF /* ECC DBE */ -#define WARM_RESET_WFI_FLAG BIT(31) -#define SYSMGR_ECC_DBE_COLD_RST_MASK (SYSMGR_ECC_OCRAM_MASK |\ +#define WARM_RESET_WFI_FLAG BIT(31) +#define SYSMGR_ECC_DBE_COLD_RST_MASK (SYSMGR_ECC_OCRAM_MASK |\ SYSMGR_ECC_DDR0_MASK |\ SYSMGR_ECC_DDR1_MASK) /* Non-mailbox SMC Call */ -#define INTEL_SIP_SMC_SVC_VERSION 0xC2000200 +#define INTEL_SIP_SMC_SVC_VERSION 0xC2000200 /* SMC function IDs for SiP Service queries */ -#define SIP_SVC_CALL_COUNT 0x8200ff00 -#define SIP_SVC_UID 0x8200ff01 -#define SIP_SVC_VERSION 0x8200ff03 +#define SIP_SVC_CALL_COUNT 0x8200ff00 +#define SIP_SVC_UID 0x8200ff01 +#define SIP_SVC_VERSION 0x8200ff03 /* SiP Service Calls version numbers */ -#define SIP_SVC_VERSION_MAJOR 1 -#define SIP_SVC_VERSION_MINOR 0 +#define SIP_SVC_VERSION_MAJOR 1 +#define SIP_SVC_VERSION_MINOR 0 /* Structure Definitions */ diff --git a/plat/intel/soc/common/sip/socfpga_sip_fcs.c b/plat/intel/soc/common/sip/socfpga_sip_fcs.c index 953ba5540..d6c0166c1 100644 --- a/plat/intel/soc/common/sip/socfpga_sip_fcs.c +++ b/plat/intel/soc/common/sip/socfpga_sip_fcs.c @@ -15,8 +15,9 @@ static fcs_crypto_service_aes_data fcs_aes_init_payload; static fcs_crypto_service_data fcs_sha_get_digest_param; static fcs_crypto_service_data fcs_sha_mac_verify_param; -static fcs_crypto_service_data fcs_ecdsa_get_pubkey_param; static fcs_crypto_service_data fcs_sha2_data_sign_param; +static fcs_crypto_service_data fcs_sha2_data_sig_verify_param; +static fcs_crypto_service_data fcs_ecdsa_get_pubkey_param; bool is_size_4_bytes_aligned(uint32_t size) { @@ -1101,6 +1102,102 @@ int intel_fcs_ecdsa_sha2_data_sign_finalize(uint32_t session_id, return INTEL_SIP_SMC_STATUS_OK; } +int intel_fcs_ecdsa_sha2_data_sig_verify_init(uint32_t session_id, + uint32_t context_id, uint32_t key_id, + uint32_t param_size, uint64_t param_data, + uint32_t *mbox_error) +{ + return intel_fcs_crypto_service_init(session_id, context_id, + key_id, param_size, param_data, + (void *) &fcs_sha2_data_sig_verify_param, + mbox_error); +} + +int intel_fcs_ecdsa_sha2_data_sig_verify_finalize(uint32_t session_id, + uint32_t context_id, uint32_t src_addr, + uint32_t src_size, uint64_t dst_addr, + uint32_t *dst_size, uint32_t data_size, + uint32_t *mbox_error) +{ + int status; + uint32_t i; + uint32_t payload[FCS_ECDSA_SHA2_DATA_SIG_VERIFY_CMD_MAX_WORD_SIZE] = {0U}; + uint32_t resp_len = *dst_size / MBOX_WORD_BYTE; + uintptr_t sig_pubkey_offset; + + if ((dst_size == NULL) || (mbox_error == NULL)) { + return INTEL_SIP_SMC_STATUS_REJECTED; + } + + if (fcs_sha2_data_sig_verify_param.session_id != session_id || + fcs_sha2_data_sig_verify_param.context_id != context_id) { + return INTEL_SIP_SMC_STATUS_REJECTED; + } + + if (!is_size_4_bytes_aligned(src_size)) { + return INTEL_SIP_SMC_STATUS_REJECTED; + } + + if (!is_8_bytes_aligned(data_size) || + !is_8_bytes_aligned(src_addr)) { + return INTEL_SIP_SMC_STATUS_REJECTED; + } + + if (!is_address_in_ddr_range(src_addr, src_size) || + !is_address_in_ddr_range(dst_addr, *dst_size)) { + return INTEL_SIP_SMC_STATUS_REJECTED; + } + + /* Prepare command payload */ + /* Crypto header */ + i = 0; + payload[i] = fcs_sha2_data_sig_verify_param.session_id; + i++; + payload[i] = fcs_sha2_data_sig_verify_param.context_id; + i++; + + payload[i] = fcs_sha2_data_sig_verify_param.crypto_param_size + & FCS_CS_FIELD_SIZE_MASK; + payload[i] |= (FCS_CS_FIELD_FLAG_INIT | FCS_CS_FIELD_FLAG_UPDATE + | FCS_CS_FIELD_FLAG_FINALIZE) + << FCS_CS_FIELD_FLAG_OFFSET; + i++; + payload[i] = fcs_sha2_data_sig_verify_param.key_id; + i++; + /* Crypto parameters */ + payload[i] = fcs_sha2_data_sig_verify_param.crypto_param + & INTEL_SIP_SMC_FCS_ECC_ALGO_MASK; + i++; + /* Data source address and size */ + payload[i] = src_addr; + i++; + payload[i] = data_size; + i++; + /* Signature + Public Key Data */ + sig_pubkey_offset = src_addr + data_size; + memcpy((uint8_t *) &payload[i], (uint8_t *) sig_pubkey_offset, + src_size - data_size); + + i += (src_size - data_size) / MBOX_WORD_BYTE; + + status = mailbox_send_cmd(MBOX_JOB_ID, + MBOX_FCS_ECDSA_SHA2_DATA_SIGN_VERIFY, payload, i, + CMD_CASUAL, (uint32_t *) dst_addr, &resp_len); + + memset((void *) &fcs_sha2_data_sig_verify_param, 0, + sizeof(fcs_crypto_service_data)); + + if (status < 0) { + *mbox_error = -status; + return INTEL_SIP_SMC_STATUS_ERROR; + } + + *dst_size = resp_len * MBOX_WORD_BYTE; + flush_dcache_range(dst_addr, *dst_size); + + return INTEL_SIP_SMC_STATUS_OK; +} + int intel_fcs_ecdsa_get_pubkey_init(uint32_t session_id, uint32_t context_id, uint32_t key_id, uint32_t param_size, uint64_t param_data, uint32_t *mbox_error) diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c index d6239c94b..df500ff0f 100644 --- a/plat/intel/soc/common/socfpga_sip_svc.c +++ b/plat/intel/soc/common/socfpga_sip_svc.c @@ -924,6 +924,19 @@ uintptr_t sip_smc_handler(uint32_t smc_fid, x4, x5, (uint32_t *) &x6, &mbox_error); SMC_RET4(handle, status, mbox_error, x5, x6); + case INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_INIT: + x5 = SMC_GET_GP(handle, CTX_GPREG_X5); + status = intel_fcs_ecdsa_sha2_data_sig_verify_init(x1, x2, x3, + x4, x5, &mbox_error); + SMC_RET2(handle, status, mbox_error); + + case INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIG_VERIFY_FINALIZE: + x5 = SMC_GET_GP(handle, CTX_GPREG_X5); + x6 = SMC_GET_GP(handle, CTX_GPREG_X6); + x7 = SMC_GET_GP(handle, CTX_GPREG_X7); + status = intel_fcs_ecdsa_sha2_data_sig_verify_finalize(x1, x2, x3, + x4, x5, (uint32_t *) &x6, x7, &mbox_error); + SMC_RET4(handle, status, mbox_error, x5, x6); case INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT: x5 = SMC_GET_GP(handle, CTX_GPREG_X5);