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Merge "fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode" into integration

This commit is contained in:
Madhukar Pappireddy 2021-09-09 00:32:08 +02:00 committed by TrustedFirmware Code Review
parent ab0c8151bc a669983c78
commit 5a7b2584db
4 changed files with 20 additions and 20 deletions
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2
drivers/marvell/comphy/comphy-cp110.h
View File

@ -54,7 +54,7 @@
#define COMMON_SELECTOR_PIPE_COMPHY_USBH 0x1
#define COMMON_SELECTOR_PIPE_COMPHY_USBD 0x2
/* SGMII/HS-SGMII/SFI/RXAUI */
/* SGMII/Base-X/SFI/RXAUI */
#define COMMON_SELECTOR_COMPHY0_1_2_NETWORK 0x1
#define COMMON_SELECTOR_COMPHY3_RXAUI 0x1
#define COMMON_SELECTOR_COMPHY3_SGMII 0x2

14
drivers/marvell/comphy/phy-comphy-3700.c
View File

@ -135,7 +135,7 @@ static void mvebu_a3700_comphy_set_phy_selector(uint8_t comphy_index,
break;
case (COMPHY_SGMII_MODE):
case (COMPHY_HS_SGMII_MODE):
case (COMPHY_2500BASEX_MODE):
if (comphy_index == COMPHY_LANE0)
reg &= ~COMPHY_SELECTOR_USB3_GBE1_SEL_BIT;
else if (comphy_index == COMPHY_LANE1)
@ -183,7 +183,7 @@ error:
* with COMPHY_USB3D_MODE or COMPHY_USB3H_MODE. (The usb3 phy initialization
* code does not differentiate between these modes.)
* Also it returns COMPHY_SGMII_MODE even if the phy was configures with
* COMPHY_HS_SGMII_MODE. (The sgmii phy initialization code does differentiate
* COMPHY_2500BASEX_MODE. (The sgmii phy initialization code does differentiate
* between these modes, but it is irrelevant when powering the phy off.)
*/
static int mvebu_a3700_comphy_get_mode(uint8_t comphy_index)
@ -401,8 +401,8 @@ static int mvebu_a3700_comphy_sgmii_power_on(uint8_t comphy_index,
/* SGMII 1G, SerDes speed 1.25G */
data |= SD_SPEED_1_25_G << GEN_RX_SEL_OFFSET;
data |= SD_SPEED_1_25_G << GEN_TX_SEL_OFFSET;
} else if (mode == COMPHY_HS_SGMII_MODE) {
/* HS SGMII (2.5G), SerDes speed 3.125G */
} else if (mode == COMPHY_2500BASEX_MODE) {
/* 2500Base-X, SerDes speed 3.125G */
data |= SD_SPEED_2_5_G << GEN_RX_SEL_OFFSET;
data |= SD_SPEED_2_5_G << GEN_TX_SEL_OFFSET;
} else {
@ -479,7 +479,7 @@ static int mvebu_a3700_comphy_sgmii_power_on(uint8_t comphy_index,
* 25 MHz the default values stored in PHY registers are OK.
*/
debug("Running C-DPI phy init %s mode\n",
mode == COMPHY_HS_SGMII_MODE ? "2G5" : "1G");
mode == COMPHY_2500BASEX_MODE ? "2G5" : "1G");
if (get_ref_clk() == 40)
comphy_sgmii_phy_init(comphy_index, mode, sd_ip_addr);
@ -883,7 +883,7 @@ int mvebu_3700_comphy_power_on(uint8_t comphy_index, uint32_t comphy_mode)
comphy_mode);
break;
case(COMPHY_SGMII_MODE):
case(COMPHY_HS_SGMII_MODE):
case(COMPHY_2500BASEX_MODE):
ret = mvebu_a3700_comphy_sgmii_power_on(comphy_index,
comphy_mode);
break;
@ -960,7 +960,7 @@ int mvebu_3700_comphy_power_off(uint8_t comphy_index, uint32_t comphy_mode)
switch (mode) {
case(COMPHY_SGMII_MODE):
case(COMPHY_HS_SGMII_MODE):
case(COMPHY_2500BASEX_MODE):
err = mvebu_a3700_comphy_sgmii_power_off(comphy_index);
break;
case (COMPHY_USB3_MODE):

2
drivers/marvell/comphy/phy-comphy-common.h
View File

@ -87,7 +87,7 @@
#define COMPHY_SATA_MODE 0x1
#define COMPHY_SGMII_MODE 0x2 /* SGMII 1G */
#define COMPHY_HS_SGMII_MODE 0x3 /* SGMII 2.5G */
#define COMPHY_2500BASEX_MODE 0x3 /* 2500Base-X */
#define COMPHY_USB3H_MODE 0x4
#define COMPHY_USB3D_MODE 0x5
#define COMPHY_PCIE_MODE 0x6

22
drivers/marvell/comphy/phy-comphy-cp110.c
View File

@ -30,7 +30,7 @@
/* COMPHY speed macro */
#define COMPHY_SPEED_1_25G 0 /* SGMII 1G */
#define COMPHY_SPEED_2_5G 1
#define COMPHY_SPEED_3_125G 2 /* SGMII 2.5G */
#define COMPHY_SPEED_3_125G 2 /* 2500Base-X */
#define COMPHY_SPEED_5G 3
#define COMPHY_SPEED_5_15625G 4 /* XFI 5G */
#define COMPHY_SPEED_6G 5
@ -191,7 +191,7 @@ static void mvebu_cp110_comphy_set_phy_selector(uint64_t comphy_base,
case(3):
/* For comphy 3:
* 0x1 = RXAUI_Lane1
* 0x2 = SGMII/HS-SGMII Port1
* 0x2 = SGMII/Base-X Port1
*/
if (mode == COMPHY_RXAUI_MODE)
reg |= COMMON_SELECTOR_COMPHY3_RXAUI <<
@ -202,20 +202,20 @@ static void mvebu_cp110_comphy_set_phy_selector(uint64_t comphy_base,
break;
case(4):
/* For comphy 4:
* 0x1 = SGMII/HS-SGMII Port1, XFI1/SFI1
* 0x2 = SGMII/HS-SGMII Port0: XFI0/SFI0, RXAUI_Lane0
* 0x1 = SGMII/Base-X Port1, XFI1/SFI1
* 0x2 = SGMII/Base-X Port0: XFI0/SFI0, RXAUI_Lane0
*
* We want to check if SGMII1/HS_SGMII1 is the
* We want to check if SGMII1 is the
* requested mode in order to determine which value
* should be set (all other modes use the same value)
* so we need to strip the mode, and check the ID
* because we might handle SGMII0/HS_SGMII0 too.
* because we might handle SGMII0 too.
*/
/* TODO: need to distinguish between CP110 and CP115
* as SFI1/XFI1 available only for CP115.
*/
if ((mode == COMPHY_SGMII_MODE ||
mode == COMPHY_HS_SGMII_MODE ||
mode == COMPHY_2500BASEX_MODE ||
mode == COMPHY_SFI_MODE ||
mode == COMPHY_XFI_MODE ||
mode == COMPHY_AP_MODE)
@ -228,7 +228,7 @@ static void mvebu_cp110_comphy_set_phy_selector(uint64_t comphy_base,
break;
case(5):
/* For comphy 5:
* 0x1 = SGMII/HS-SGMII Port2
* 0x1 = SGMII/Base-X Port2
* 0x2 = RXAUI Lane1
*/
if (mode == COMPHY_RXAUI_MODE)
@ -713,7 +713,7 @@ static int mvebu_cp110_comphy_sgmii_power_on(uint64_t comphy_base,
data |= 0x6 << SD_EXTERNAL_CONFIG0_SD_PHY_GEN_RX_OFFSET;
data |= 0x6 << SD_EXTERNAL_CONFIG0_SD_PHY_GEN_TX_OFFSET;
} else if (sgmii_speed == COMPHY_SPEED_3_125G) {
/* HS SGMII (2.5G), SerDes speed 3.125G */
/* 2500Base-X, SerDes speed 3.125G */
data |= 0x8 << SD_EXTERNAL_CONFIG0_SD_PHY_GEN_RX_OFFSET;
data |= 0x8 << SD_EXTERNAL_CONFIG0_SD_PHY_GEN_TX_OFFSET;
} else {
@ -2343,7 +2343,7 @@ int mvebu_cp110_comphy_digital_reset(uint64_t comphy_base,
switch (mode) {
case (COMPHY_SGMII_MODE):
case (COMPHY_HS_SGMII_MODE):
case (COMPHY_2500BASEX_MODE):
case (COMPHY_XFI_MODE):
case (COMPHY_SFI_MODE):
case (COMPHY_RXAUI_MODE):
@ -2378,7 +2378,7 @@ int mvebu_cp110_comphy_power_on(uint64_t comphy_base,
comphy_mode);
break;
case(COMPHY_SGMII_MODE):
case(COMPHY_HS_SGMII_MODE):
case(COMPHY_2500BASEX_MODE):
err = mvebu_cp110_comphy_sgmii_power_on(comphy_base,
comphy_index,
comphy_mode);