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Remove MULTI_CONSOLE_API flag and references to it 

The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
This commit is contained in:
Ambroise Vincent 2019-04-04 09:13:28 +01:00
parent 51e24ec2c6
commit 5b6ebeec9c
44 changed files with 0 additions and 252 deletions
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2
Makefile
View File

@ -647,7 +647,6 @@ $(eval $(call assert_boolean,GENERATE_COT))
$(eval $(call assert_boolean,GICV2_G0_FOR_EL3))
$(eval $(call assert_boolean,HANDLE_EA_EL3_FIRST))
$(eval $(call assert_boolean,HW_ASSISTED_COHERENCY))
$(eval $(call assert_boolean,MULTI_CONSOLE_API))
$(eval $(call assert_boolean,NS_TIMER_SWITCH))
$(eval $(call assert_boolean,OVERRIDE_LIBC))
$(eval $(call assert_boolean,PL011_GENERIC_UART))
@ -702,7 +701,6 @@ $(eval $(call add_define,GICV2_G0_FOR_EL3))
$(eval $(call add_define,HANDLE_EA_EL3_FIRST))
$(eval $(call add_define,HW_ASSISTED_COHERENCY))
$(eval $(call add_define,LOG_LEVEL))
$(eval $(call add_define,MULTI_CONSOLE_API))
$(eval $(call add_define,NS_TIMER_SWITCH))
$(eval $(call add_define,PL011_GENERIC_UART))
$(eval $(call add_define,PLAT_${PLAT}))

11
drivers/arm/pl011/aarch32/pl011_console.S
View File

@ -86,7 +86,6 @@ core_init_fail:
bx lr
endfunc console_pl011_core_init
#if MULTI_CONSOLE_API
.globl console_pl011_register
/* -------------------------------------------------------
@ -122,16 +121,6 @@ func console_pl011_register
register_fail:
pop {r4, pc}
endfunc console_pl011_register
#else
.globl console_core_init
.globl console_core_putc
.globl console_core_getc
.globl console_core_flush
.equ console_core_init, console_pl011_core_init
.equ console_core_putc, console_pl011_core_putc
.equ console_core_getc, console_pl011_core_getc
.equ console_core_flush, console_pl011_core_flush
#endif
/* --------------------------------------------------------
* int console_core_putc(int c, uintptr_t base_addr)

11
drivers/arm/pl011/aarch64/pl011_console.S
View File

@ -75,7 +75,6 @@ core_init_fail:
ret
endfunc console_pl011_core_init
#if MULTI_CONSOLE_API
.globl console_pl011_register
/* -----------------------------------------------
@ -109,16 +108,6 @@ func console_pl011_register
register_fail:
ret x7
endfunc console_pl011_register
#else
.globl console_core_init
.globl console_core_putc
.globl console_core_getc
.globl console_core_flush
.equ console_core_init,console_pl011_core_init
.equ console_core_putc,console_pl011_core_putc
.equ console_core_getc,console_pl011_core_getc
.equ console_core_flush,console_pl011_core_flush
#endif
/* --------------------------------------------------------
* int console_pl011_core_putc(int c, uintptr_t base_addr)

11
drivers/cadence/uart/aarch64/cdns_console.S
View File

@ -51,7 +51,6 @@ core_init_fail:
ret
endfunc console_cdns_core_init
#if MULTI_CONSOLE_API
.globl console_cdns_register
/* -----------------------------------------------
@ -85,16 +84,6 @@ func console_cdns_register
register_fail:
ret x7
endfunc console_cdns_register
#else
.globl console_core_init
.globl console_core_putc
.globl console_core_getc
.globl console_core_flush
.equ console_core_init,console_cdns_core_init
.equ console_core_putc,console_cdns_core_putc
.equ console_core_getc,console_cdns_core_getc
.equ console_core_flush,console_cdns_core_flush
#endif
/* --------------------------------------------------------
* int console_cdns_core_putc(int c, uintptr_t base_addr)

2
drivers/console/aarch64/skeleton_console.S
View File

@ -22,8 +22,6 @@
* any function may always clobber the intra-procedure-call registers
* X16 and X17, but may never depend on them retaining their values
* across any function call.)
* Platforms using drivers based on this template need to enable
* MULTI_CONSOLE_API := 1 in their platform.mk.
*/
.globl console_xxx_register

4
drivers/console/multi_console.c
View File

@ -4,8 +4,6 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#if MULTI_CONSOLE_API
#include <assert.h>
#include <drivers/console.h>
@ -121,5 +119,3 @@ int console_flush(void)
return err;
}
#endif /* MULTI_CONSOLE_API */

11
drivers/ti/uart/aarch64/16550_console.S
View File

@ -83,7 +83,6 @@ init_fail:
ret
endfunc console_16550_core_init
#if MULTI_CONSOLE_API
.globl console_16550_register
/* -----------------------------------------------
@ -117,16 +116,6 @@ func console_16550_register
register_fail:
ret x7
endfunc console_16550_register
#else
.globl console_core_init
.globl console_core_putc
.globl console_core_getc
.globl console_core_flush
.equ console_core_init,console_16550_core_init
.equ console_core_putc,console_16550_core_putc
.equ console_core_getc,console_16550_core_getc
.equ console_core_flush,console_16550_core_flush
#endif
/* --------------------------------------------------------
* int console_16550_core_putc(int c, uintptr_t base_addr)

7
include/drivers/console.h
View File

@ -75,13 +75,6 @@ int console_getc(void);
/* Flush all consoles registered for the current state. */
int console_flush(void);
#if !MULTI_CONSOLE_API
/* REMOVED on AArch64 -- use console_<driver>_register() instead! */
int console_init(uintptr_t base_addr,
unsigned int uart_clk, unsigned int baud_rate);
void console_uninit(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONSOLE_H */

4
make_helpers/defaults.mk
View File

@ -136,10 +136,6 @@ HW_ASSISTED_COHERENCY := 0
# Set the default algorithm for the generation of Trusted Board Boot keys
KEY_ALG := rsa
# Enable use of the console API allowing multiple consoles to be registered
# at the same time.
MULTI_CONSOLE_API := 1
# NS timer register save and restore
NS_TIMER_SWITCH := 0

2
plat/allwinner/common/allwinner-common.mk
View File

@ -49,8 +49,6 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1
MULTI_CONSOLE_API := 1
# The reset vector can be changed for each CPU.
PROGRAMMABLE_RESET_ADDRESS := 1

2
plat/arm/board/fvp_ve/platform.mk
View File

@ -106,8 +106,6 @@ endif
$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
MULTI_CONSOLE_API := 1
ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
# Only use nonlpae version of xlatv1 otherwise use xlat v2
PLAT_BL_COMMON_SOURCES += lib/xlat_tables/${ARCH}/nonlpae_tables.c

4
plat/arm/common/arm_bl31_setup.c
View File

@ -240,11 +240,7 @@ void arm_bl31_platform_setup(void)
******************************************************************************/
void arm_bl31_plat_runtime_setup(void)
{
#if MULTI_CONSOLE_API
console_switch_state(CONSOLE_FLAG_RUNTIME);
#else
console_uninit();
#endif
/* Initialize the runtime console */
arm_console_runtime_init();

3
plat/arm/common/arm_common.mk
View File

@ -125,9 +125,6 @@ ENABLE_PMF := 1
# mapping the former as executable and the latter as execute-never.
SEPARATE_CODE_AND_RODATA := 1
# Use the multi console API, which is only available for AArch64 for now
MULTI_CONSOLE_API := 1
# Disable ARM Cryptocell by default
ARM_CRYPTOCELL_INTEG := 0
$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))

23
plat/arm/common/arm_console.c
View File

@ -16,15 +16,12 @@
/*******************************************************************************
* Functions that set up the console
******************************************************************************/
#if MULTI_CONSOLE_API
static console_pl011_t arm_boot_console;
static console_pl011_t arm_runtime_console;
#endif
/* Initialize the console to provide early debug support */
void __init arm_console_boot_init(void)
{
#if MULTI_CONSOLE_API
int rc = console_pl011_register(PLAT_ARM_BOOT_UART_BASE,
PLAT_ARM_BOOT_UART_CLK_IN_HZ,
ARM_CONSOLE_BAUDRATE,
@ -39,28 +36,17 @@ void __init arm_console_boot_init(void)
}
console_set_scope(&arm_boot_console.console, CONSOLE_FLAG_BOOT);
#else
(void)console_init(PLAT_ARM_BOOT_UART_BASE,
PLAT_ARM_BOOT_UART_CLK_IN_HZ,
ARM_CONSOLE_BAUDRATE);
#endif /* MULTI_CONSOLE_API */
}
void arm_console_boot_end(void)
{
(void)console_flush();
#if MULTI_CONSOLE_API
(void)console_unregister(&arm_boot_console.console);
#else
console_uninit();
#endif /* MULTI_CONSOLE_API */
}
/* Initialize the runtime console */
void arm_console_runtime_init(void)
{
#if MULTI_CONSOLE_API
int rc = console_pl011_register(PLAT_ARM_RUN_UART_BASE,
PLAT_ARM_RUN_UART_CLK_IN_HZ,
ARM_CONSOLE_BAUDRATE,
@ -69,18 +55,9 @@ void arm_console_runtime_init(void)
panic();
console_set_scope(&arm_runtime_console.console, CONSOLE_FLAG_RUNTIME);
#else
(void)console_init(PLAT_ARM_RUN_UART_BASE,
PLAT_ARM_RUN_UART_CLK_IN_HZ,
ARM_CONSOLE_BAUDRATE);
#endif /* MULTI_CONSOLE_API */
}
void arm_console_runtime_end(void)
{
(void)console_flush();
#if !MULTI_CONSOLE_API
console_uninit();
#endif /* !MULTI_CONSOLE_API */
}

7
plat/arm/common/tsp/arm_tsp_setup.c
View File

@ -28,13 +28,10 @@
/*******************************************************************************
* Initialize the UART
******************************************************************************/
#if MULTI_CONSOLE_API
static console_pl011_t arm_tsp_runtime_console;
#endif
void arm_tsp_early_platform_setup(void)
{
#if MULTI_CONSOLE_API
/*
* Initialize a different console than already in use to display
* messages from TSP
@ -48,10 +45,6 @@ void arm_tsp_early_platform_setup(void)
console_set_scope(&arm_tsp_runtime_console.console,
CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME);
#else
console_init(PLAT_ARM_TSP_UART_BASE, PLAT_ARM_TSP_UART_CLK_IN_HZ,
ARM_CONSOLE_BAUDRATE);
#endif /* MULTI_CONSOLE_API */
}
void tsp_early_platform_setup(void)

24
plat/common/aarch32/crash_console_helpers.S
View File

@ -16,8 +16,6 @@
.globl plat_crash_console_putc
.globl plat_crash_console_flush
#if MULTI_CONSOLE_API
/* -----------------------------------------------------
* int plat_crash_console_init(void)
* Use normal console by default. Switch it to crash
@ -68,25 +66,3 @@ endfunc plat_crash_console_putc
func plat_crash_console_flush
b console_flush
endfunc plat_crash_console_flush
#else /* MULTI_CONSOLE_API */
/* -----------------------------------------------------
* In the old API these are all no-op stubs that need to
* be overridden by the platform to be useful.
* -----------------------------------------------------
*/
func plat_crash_console_init
mov r0, #0
bx lr
endfunc plat_crash_console_init
func plat_crash_console_putc
bx lr
endfunc plat_crash_console_putc
func plat_crash_console_flush
bx lr
endfunc plat_crash_console_flush
#endif

4
plat/common/aarch32/plat_sp_min_common.c
View File

@ -21,9 +21,5 @@ void sp_min_plat_runtime_setup(void)
* Finish the use of console driver in SP_MIN so that any runtime logs
* from SP_MIN will be suppressed.
*/
#if MULTI_CONSOLE_API
console_switch_state(CONSOLE_FLAG_RUNTIME);
#else
console_uninit();
#endif
}

4
plat/common/aarch64/crash_console_helpers.S
View File

@ -16,10 +16,6 @@
.globl plat_crash_console_putc
.globl plat_crash_console_flush
#if !MULTI_CONSOLE_API
#error "This crash console implementation only works with the MULTI_CONSOLE_API!"
#endif
/*
* Spinlock to syncronize access to crash_console_triggered. We cannot
* acquire spinlocks when the cache is disabled, so in some cases (like

4
plat/common/aarch64/plat_common.c
View File

@ -30,11 +30,7 @@
void bl31_plat_runtime_setup(void)
{
#if MULTI_CONSOLE_API
console_switch_state(CONSOLE_FLAG_RUNTIME);
#else
console_uninit();
#endif
}
/*

1
plat/hisilicon/hikey/platform.mk
View File

@ -20,7 +20,6 @@ endif
CONSOLE_BASE := PL011_UART3_BASE
CRASH_CONSOLE_BASE := PL011_UART3_BASE
MULTI_CONSOLE_API := 1
PLAT_PARTITION_MAX_ENTRIES := 12
PLAT_PL061_MAX_GPIOS := 160
COLD_BOOT_SINGLE_CPU := 1

1
plat/hisilicon/hikey960/platform.mk
View File

@ -17,7 +17,6 @@ else
$(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value")
endif
MULTI_CONSOLE_API := 1
CRASH_CONSOLE_BASE := PL011_UART6_BASE
COLD_BOOT_SINGLE_CPU := 1
PLAT_PL061_MAX_GPIOS := 176

1
plat/hisilicon/poplar/platform.mk
View File

@ -46,7 +46,6 @@ ERRATA_A53_855873 := 1
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
ENABLE_SVE_FOR_NS := 0
MULTI_CONSOLE_API := 1
WORKAROUND_CVE_2017_5715 := 0
PLAT_PL061_MAX_GPIOS := 104

3
plat/imx/imx7/warp7/platform.mk
View File

@ -119,9 +119,6 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# PLAT_WARP7_UART
PLAT_WARP7_UART :=1
$(eval $(call add_define,PLAT_WARP7_UART))

1
plat/imx/imx8m/imx8mm/platform.mk
View File

@ -39,7 +39,6 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
MULTI_CONSOLE_API := 1
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1

1
plat/imx/imx8m/imx8mq/platform.mk
View File

@ -39,7 +39,6 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
MULTI_CONSOLE_API := 1
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1

1
plat/imx/imx8qm/platform.mk
View File

@ -36,7 +36,6 @@ include plat/imx/common/sci/sci_api.mk
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
MULTI_CONSOLE_API := 1
ERRATA_A72_859971 := 1
ERRATA_A53_835769 := 1

1
plat/imx/imx8qx/platform.mk
View File

@ -33,4 +33,3 @@ include plat/imx/common/sci/sci_api.mk
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
MULTI_CONSOLE_API := 1

1
plat/intel/soc/stratix10/platform.mk
View File

@ -67,5 +67,4 @@ BL31_SOURCES += drivers/arm/cci/cci.c \
PROGRAMMABLE_RESET_ADDRESS := 0
BL2_AT_EL3 := 1
MULTI_CONSOLE_API := 1
USE_COHERENT_MEM := 1

3
plat/layerscape/board/ls1043/platform.mk
View File

@ -56,9 +56,6 @@ BL31_SOURCES += plat/layerscape/board/ls1043/ls1043_bl31_setup.c \
${LS1043_INTERCONNECT_SOURCES} \
${LS1043_SECURITY_SOURCES}
# Disable the PSCI platform compatibility layer
MULTI_CONSOLE_API := 1
# Enable workarounds for selected Cortex-A53 erratas.
ERRATA_A53_855873 := 1

11
plat/layerscape/common/aarch64/ls_console.S
View File

@ -78,7 +78,6 @@ init_fail:
ret
endfunc console_ls_16550_core_init
#if MULTI_CONSOLE_API
.globl console_ls_16550_register
/* -----------------------------------------------
@ -111,16 +110,6 @@ func console_ls_16550_register
register_fail:
ret x7
endfunc console_ls_16550_register
#else
.globl console_core_init
.globl console_core_putc
.globl console_core_getc
.globl console_core_flush
.equ console_core_init,console_ls_16550_core_init
.equ console_core_putc,console_ls_16550_core_putc
.equ console_core_getc,console_ls_16550_core_getc
.equ console_core_flush,console_ls_16550_core_flush
#endif
/* --------------------------------------------------------
* int console_ls_16550_core_putc(int c, uintptr_t base_addr)

40
plat/layerscape/common/aarch64/ls_helpers.S
View File

@ -49,7 +49,6 @@ endfunc plat_ls_calc_core_pos
* ---------------------------------------------
*/
#if MULTI_CONSOLE_API
/* -----------------------------------------------------
* int plat_crash_console_init(void)
* Use normal console by default. Switch it to crash
@ -101,45 +100,6 @@ func plat_crash_console_flush
b console_flush
endfunc plat_crash_console_flush
#else /* MULTI_CONSOLE_API */
/* -----------------------------------------------------
* In the old API these are all no-op stubs that need to
* be overridden by the platform to be useful.
* -----------------------------------------------------
*/
func plat_crash_console_init
mov_imm x0, PLAT_LS1043_UART_BASE
mov_imm x1, PLAT_LS1043_UART_CLOCK
mov_imm x2, PLAT_LS1043_UART_BAUDRATE
b console_core_init
endfunc plat_crash_console_init
/* ---------------------------------------------
* int plat_crash_console_putc(int c)
* Function to print a character on the crash
* console without a C Runtime.
* Clobber list : x1, x2
* ---------------------------------------------
*/
func plat_crash_console_putc
mov_imm x1, PLAT_LS1043_UART_BASE
b console_core_putc
endfunc plat_crash_console_putc
/* ---------------------------------------------
* int plat_crash_console_flush()
* Function to force a write of all buffered
* data that hasn't been output.
* Out : return -1 on error else return 0.
* Clobber list : r0 - r1
* ---------------------------------------------
*/
func plat_crash_console_flush
mov_imm x1, PLAT_LS1043_UART_BASE
b console_core_flush
endfunc plat_crash_console_flush
#endif
/* ---------------------------------------------------------------------
* We don't need to carry out any memory initialization on LS
* platforms. The Secure SRAM is accessible straight away.

2
plat/marvell/common/marvell_common.mk
View File

@ -11,8 +11,6 @@ include $(MARVELL_PLAT_BASE)/marvell.mk
VERSION_STRING +=(Marvell-${SUBVERSION})
MULTI_CONSOLE_API := 1
SEPARATE_CODE_AND_RODATA := 1
# flag to switch from PLL to ARO

7
plat/meson/gxbb/platform.mk
View File

@ -57,16 +57,9 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# Verify build config
# -------------------
ifneq (${MULTI_CONSOLE_API}, 1)
$(error Error: gxbb needs MULTI_CONSOLE_API=1)
endif
ifneq (${RESET_TO_BL31}, 0)
$(error Error: gxbb needs RESET_TO_BL31=0)
endif

7
plat/meson/gxl/platform.mk
View File

@ -62,16 +62,9 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# Verify build config
# -------------------
ifneq (${MULTI_CONSOLE_API}, 1)
$(error Error: gxl needs MULTI_CONSOLE_API=1)
endif
ifneq (${RESET_TO_BL31}, 0)
$(error Error: gxl needs RESET_TO_BL31=0)
endif

6
plat/qemu/platform.mk
View File

@ -151,12 +151,6 @@ ifneq ($(ENABLE_STACK_PROTECTOR), 0)
PLAT_BL_COMMON_SOURCES += plat/qemu/qemu_stack_protector.c
endif
# Use MULTI_CONSOLE_API by default only on AArch64
# as it is not yet supported on AArch32
ifeq ($(ARCH),aarch64)
MULTI_CONSOLE_API := 1
endif
BL32_RAM_LOCATION := tdram
ifeq (${BL32_RAM_LOCATION}, tsram)
BL32_RAM_LOCATION_ID = SEC_SRAM_ID

8
plat/qemu/qemu_console.c
View File

@ -9,23 +9,15 @@
#include <drivers/console.h>
#include <drivers/arm/pl011.h>
#if MULTI_CONSOLE_API
static console_pl011_t console;
#endif /* MULTI_CONSOLE_API */
void qemu_console_init(void)
{
#if MULTI_CONSOLE_API
(void)console_pl011_register(PLAT_QEMU_BOOT_UART_BASE,
PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
PLAT_QEMU_CONSOLE_BAUDRATE, &console);
console_set_scope(&console.console, CONSOLE_FLAG_BOOT |
CONSOLE_FLAG_RUNTIME);
#else
console_init(PLAT_QEMU_BOOT_UART_BASE,
PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
PLAT_QEMU_CONSOLE_BAUDRATE);
#endif /* MULTI_CONSOLE_API */
}

2
plat/rockchip/rk3328/platform.mk
View File

@ -51,8 +51,6 @@ BL31_SOURCES += ${RK_GIC_SOURCES} \
${RK_PLAT_SOC}/drivers/pmu/pmu.c \
${RK_PLAT_SOC}/drivers/soc/soc.c
MULTI_CONSOLE_API := 1
include lib/coreboot/coreboot.mk
include lib/libfdt/libfdt.mk

2
plat/rockchip/rk3368/platform.mk
View File

@ -50,8 +50,6 @@ BL31_SOURCES += ${RK_GIC_SOURCES} \
${RK_PLAT_SOC}/drivers/soc/soc.c \
${RK_PLAT_SOC}/drivers/ddr/ddr_rk3368.c \
MULTI_CONSOLE_API := 1
include lib/coreboot/coreboot.mk
include lib/libfdt/libfdt.mk

2
plat/rockchip/rk3399/platform.mk
View File

@ -67,8 +67,6 @@ BL31_SOURCES += ${RK_GIC_SOURCES} \
${RK_PLAT_SOC}/drivers/dram/dram_spec_timing.c \
${RK_PLAT_SOC}/drivers/dram/suspend.c
MULTI_CONSOLE_API := 1
include lib/coreboot/coreboot.mk
include lib/libfdt/libfdt.mk

7
plat/rpi3/platform.mk
View File

@ -102,9 +102,6 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# Platform build flags
# --------------------
@ -152,10 +149,6 @@ ifneq (${RPI3_DIRECT_LINUX_BOOT}, 0)
endif
endif
ifneq (${MULTI_CONSOLE_API}, 1)
$(error Error: rpi3 needs MULTI_CONSOLE_API=1)
endif
ifneq (${RESET_TO_BL31}, 0)
$(error Error: rpi3 needs RESET_TO_BL31=0)
endif

1
plat/socionext/synquacer/platform.mk
View File

@ -5,7 +5,6 @@
#
override RESET_TO_BL31 := 1
override MULTI_CONSOLE_API := 1
override PROGRAMMABLE_RESET_ADDRESS := 1
override USE_COHERENT_MEM := 1
override SEPARATE_CODE_AND_RODATA := 1

1
plat/st/stm32mp1/platform.mk
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@ -8,7 +8,6 @@ ARM_CORTEX_A7 := yes
ARM_WITH_NEON := yes
BL2_AT_EL3 := 1
USE_COHERENT_MEM := 0
MULTI_CONSOLE_API := 1
STM32_TF_VERSION ?= 0

1
plat/ti/k3/common/plat_common.mk
View File

@ -28,7 +28,6 @@ ERRATA_A72_859971 := 1
# Split out RO data into a non-executable section
SEPARATE_CODE_AND_RODATA := 1
MULTI_CONSOLE_API := 1
TI_16550_MDR_QUIRK := 1
$(eval $(call add_define,TI_16550_MDR_QUIRK))

1
plat/xilinx/versal/platform.mk
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@ -8,7 +8,6 @@ A53_DISABLE_NON_TEMPORAL_HINT := 0
SEPARATE_CODE_AND_RODATA := 1
override RESET_TO_BL31 := 1
PL011_GENERIC_UART := 1
MULTI_CONSOLE_API := 1
ifdef VERSAL_ATF_MEM_BASE
$(eval $(call add_define,VERSAL_ATF_MEM_BASE))