feat(plat/mediatek/mt8186): add pwrap and pmic driver

1. Add 8186 pwrap driver to access pmic.
2. Add 6366 pmic driver to support clean PWRHOLD.

TEST=build pass
BUG=b:202871018

Signed-off-by: James Lo <james.lo@mediatek.corp-partner.google.com>
Change-Id: I3bc90460a6a55dff8d3293e04482abcad789bbb2
This commit is contained in:
James Lo 2021-10-06 18:12:30 +08:00 committed by Rex-BC Chen
parent d73e15e66a
commit 5bc88ec61c
6 changed files with 145 additions and 0 deletions

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@ -0,0 +1,23 @@
/*
* Copyright (c) 2021, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/debug.h>
#include <pmic.h>
#include <pmic_wrap_init.h>
uint32_t pmic_get_hwcid(void)
{
uint32_t val = 0;
pwrap_read(PMIC_RG_HWCID_ADDR, &val);
return val;
}
void pmic_power_off(void)
{
pwrap_write(PMIC_PWRHOLD, 0x0);
}

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@ -0,0 +1,19 @@
/*
* Copyright (c) 2021, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PMIC_H
#define PMIC_H
#include <stdint.h>
#define PMIC_RG_HWCID_ADDR 0x8
#define PMIC_PWRHOLD 0xa08
/* external API */
uint32_t pmic_get_hwcid(void);
void pmic_power_off(void);
#endif /* PMIC_H */

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@ -0,0 +1,94 @@
/*
* Copyright (c) 2021, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PMIC_WRAP_INIT_H
#define PMIC_WRAP_INIT_H
#include <stdint.h>
#include "platform_def.h"
/* external API */
int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
int32_t pwrap_write(uint32_t adr, uint32_t wdata);
static struct mt8186_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
/* timeout setting */
enum {
TIMEOUT_RESET = 50, /* us */
TIMEOUT_READ = 50, /* us */
TIMEOUT_WAIT_IDLE = 50 /* us */
};
/* PMIC_WRAP registers */
struct mt8186_pmic_wrap_regs {
uint32_t unused[776];
uint32_t wacs2_cmd;
uint32_t wacs2_rdata;
uint32_t wacs2_vldclr;
};
enum {
RDATA_WACS_RDATA_SHIFT = 0,
RDATA_WACS_FSM_SHIFT = 16,
RDATA_WACS_REQ_SHIFT = 19,
RDATA_SYNC_IDLE_SHIFT = 20,
RDATA_INIT_DONE_SHIFT = 22,
RDATA_SYS_IDLE_SHIFT = 23,
};
enum {
RDATA_WACS_RDATA_MASK = 0xffff,
RDATA_WACS_FSM_MASK = 0x7,
RDATA_WACS_REQ_MASK = 0x1,
RDATA_SYNC_IDLE_MASK = 0x1,
RDATA_INIT_DONE_MASK = 0x1,
RDATA_SYS_IDLE_MASK = 0x1,
};
/* WACS_FSM */
enum {
WACS_FSM_IDLE = 0x00,
WACS_FSM_REQ = 0x02,
WACS_FSM_WFDLE = 0x04,
WACS_FSM_WFVLDCLR = 0x06,
WACS_INIT_DONE = 0x01,
WACS_SYNC_IDLE = 0x01,
WACS_SYNC_BUSY = 0x00
};
/* error information flag */
enum {
E_PWR_INVALID_ARG = 1,
E_PWR_INVALID_RW = 2,
E_PWR_INVALID_ADDR = 3,
E_PWR_INVALID_WDAT = 4,
E_PWR_INVALID_OP_MANUAL = 5,
E_PWR_NOT_IDLE_STATE = 6,
E_PWR_NOT_INIT_DONE = 7,
E_PWR_NOT_INIT_DONE_READ = 8,
E_PWR_WAIT_IDLE_TIMEOUT = 9,
E_PWR_WAIT_IDLE_TIMEOUT_READ = 10,
E_PWR_INIT_SIDLY_FAIL = 11,
E_PWR_RESET_TIMEOUT = 12,
E_PWR_TIMEOUT = 13,
E_PWR_INIT_RESET_SPI = 20,
E_PWR_INIT_SIDLY = 21,
E_PWR_INIT_REG_CLOCK = 22,
E_PWR_INIT_ENABLE_PMIC = 23,
E_PWR_INIT_DIO = 24,
E_PWR_INIT_CIPHER = 25,
E_PWR_INIT_WRITE_TEST = 26,
E_PWR_INIT_ENABLE_CRC = 27,
E_PWR_INIT_ENABLE_DEWRAP = 28,
E_PWR_INIT_ENABLE_EVENT = 29,
E_PWR_READ_TEST_FAIL = 30,
E_PWR_WRITE_TEST_FAIL = 31,
E_PWR_SWITCH_DIO = 32
};
#endif /* PMIC_WRAP_INIT_H */

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@ -29,6 +29,11 @@
#define UART_BAUDRATE 115200
/*******************************************************************************
* PWRAP related constants
******************************************************************************/
#define PMIC_WRAP_BASE (IO_PHYS + 0x0000D000)
/*******************************************************************************
* EMI MPU related constants
******************************************************************************/

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@ -4,6 +4,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/debug.h>
#include <lib/psci/psci.h>
static const plat_psci_ops_t plat_psci_ops = {

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@ -10,6 +10,7 @@ MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/timer/ \
-I${MTK_PLAT_SOC}/drivers/emi_mpu/ \
-I${MTK_PLAT_SOC}/drivers/pmic/ \
-I${MTK_PLAT_SOC}/include/
include drivers/arm/gic/v3/gicv3.mk
@ -29,6 +30,7 @@ BL31_SOURCES += common/desc_image_load.c \
lib/cpus/aarch64/cortex_a55.S \
lib/cpus/aarch64/cortex_a76.S \
plat/common/plat_gicv3.c \
${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \
${MTK_PLAT}/common/mtk_plat_common.c \
${MTK_PLAT}/common/params_setup.c \
${MTK_PLAT}/common/drivers/timer/mt_timer.c \
@ -36,6 +38,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
${MTK_PLAT_SOC}/bl31_plat_setup.c \
${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \
${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_topology.c