Make system register functions inline assembly
Replace the current out-of-line assembler implementations of the system register and system instruction operations with inline assembler. This enables better compiler optimisation and code generation when accessing system registers. Fixes ARM-software/tf-issues#91 Change-Id: I149af3a94e1e5e5140a3e44b9abfc37ba2324476
This commit is contained in:
Andrew Thoelke
parent
977fbcd4e0
commit
5c3272a717
1
Makefile
1
Makefile
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@ -75,7 +75,6 @@ BL_COMMON_SOURCES := common/bl_common.c \
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common/debug.c \
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lib/aarch64/cache_helpers.S \
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lib/aarch64/misc_helpers.S \
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lib/aarch64/tlb_helpers.S \
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lib/aarch64/xlat_helpers.c \
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lib/stdlib/std.c \
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lib/io_storage.c \
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@ -1,85 +0,0 @@
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <asm_macros.S>
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.globl read_icc_sre_el1
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.globl read_icc_sre_el2
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.globl read_icc_sre_el3
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.globl write_icc_sre_el1
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.globl write_icc_sre_el2
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.globl write_icc_sre_el3
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.globl write_icc_pmr_el1
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/*
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* Register definitions used by GCC for GICv3 access.
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* These are defined by ARMCC, so keep them in the GCC specific code for now.
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*/
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#define ICC_SRE_EL1 S3_0_C12_C12_5
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#define ICC_SRE_EL2 S3_4_C12_C9_5
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#define ICC_SRE_EL3 S3_6_C12_C12_5
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#define ICC_CTLR_EL1 S3_0_C12_C12_4
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#define ICC_CTLR_EL3 S3_6_C12_C12_4
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#define ICC_PMR_EL1 S3_0_C4_C6_0
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func read_icc_sre_el1
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mrs x0, ICC_SRE_EL1
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ret
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func read_icc_sre_el2
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mrs x0, ICC_SRE_EL2
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ret
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func read_icc_sre_el3
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mrs x0, ICC_SRE_EL3
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ret
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func write_icc_sre_el1
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msr ICC_SRE_EL1, x0
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ret
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func write_icc_sre_el2
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msr ICC_SRE_EL2, x0
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ret
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func write_icc_sre_el3
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msr ICC_SRE_EL3, x0
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ret
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func write_icc_pmr_el1
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msr ICC_PMR_EL1, x0
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ret
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@ -68,14 +68,6 @@
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******************************************************************************/
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uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr);
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unsigned int read_icc_sre_el1(void);
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unsigned int read_icc_sre_el2(void);
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unsigned int read_icc_sre_el3(void);
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void write_icc_sre_el1(unsigned int);
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void write_icc_sre_el2(unsigned int);
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void write_icc_sre_el3(unsigned int);
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void write_icc_pmr_el1(unsigned int);
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/*******************************************************************************
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* GIC Redistributor interface accessors
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******************************************************************************/
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@ -64,6 +64,16 @@
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/* Constant to highlight the assumption that MPIDR allocation starts from 0 */
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#define FIRST_MPIDR 0
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/*******************************************************************************
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* Definitions for CPU system register interface to GICv3
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******************************************************************************/
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#define ICC_SRE_EL1 S3_0_C12_C12_5
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#define ICC_SRE_EL2 S3_4_C12_C9_5
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#define ICC_SRE_EL3 S3_6_C12_C12_5
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#define ICC_CTLR_EL1 S3_0_C12_C12_4
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#define ICC_CTLR_EL3 S3_6_C12_C12_4
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#define ICC_PMR_EL1 S3_0_C4_C6_0
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/*******************************************************************************
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* Implementation defined sysreg encodings
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******************************************************************************/
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@ -31,52 +31,115 @@
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#ifndef __ARCH_HELPERS_H__
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#define __ARCH_HELPERS_H__
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#include <cdefs.h> /* For __dead2 */
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#include <arch.h> /* for additional register definitions */
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#include <cdefs.h> /* For __dead2 */
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#include <stdint.h>
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/**********************************************************************
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* Macros which create inline functions to read or write CPU system
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* registers
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*********************************************************************/
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#define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \
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static inline uint64_t read_ ## _name(void) \
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{ \
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uint64_t v; \
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__asm__ ("mrs %0, " #_reg_name : "=r" (v)); \
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return v; \
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}
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#define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) \
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static inline void write_ ## _name(uint64_t v) \
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{ \
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__asm__ ("msr " #_reg_name ", %0" : : "r" (v)); \
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}
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#define _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _reg_name) \
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static inline void write_ ## _name(const uint64_t v) \
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{ \
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__asm__ ("msr " #_reg_name ", %0" : : "i" (v)); \
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}
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/* Define read function for system register */
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#define DEFINE_SYSREG_READ_FUNC(_name) \
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_DEFINE_SYSREG_READ_FUNC(_name, _name)
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/* Define read & write function for system register */
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#define DEFINE_SYSREG_RW_FUNCS(_name) \
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_DEFINE_SYSREG_READ_FUNC(_name, _name) \
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_DEFINE_SYSREG_WRITE_FUNC(_name, _name)
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/* Define read & write function for renamed system register */
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#define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \
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_DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \
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_DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name)
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/* Define write function for special system registers */
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#define DEFINE_SYSREG_WRITE_CONST_FUNC(_name) \
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_DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _name)
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/**********************************************************************
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* Macros to create inline functions for system instructions
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*********************************************************************/
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/* Define function for simple system instruction */
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#define DEFINE_SYSOP_FUNC(_op) \
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static inline void _op() \
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{ \
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__asm__ (#_op); \
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}
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/* Define function for system instruction with type specifier */
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#define DEFINE_SYSOP_TYPE_FUNC(_op, _type) \
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static inline void _op ## _type() \
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{ \
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__asm__ (#_op " " #_type); \
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}
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/* Define function for system instruction with register parameter */
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#define DEFINE_SYSOP_TYPE_PARAM_FUNC(_op, _type) \
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static inline void _op ## _type(uint64_t v) \
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{ \
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__asm__ (#_op " " #_type ", %0" : : "r" (v)); \
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}
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/*******************************************************************************
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* Aarch64 translation tables manipulation helper prototypes
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******************************************************************************/
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unsigned long create_table_desc(unsigned long *next_table_ptr);
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unsigned long create_block_desc(unsigned long desc,
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unsigned long addr,
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unsigned int level);
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unsigned long create_device_block(unsigned long output_addr,
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unsigned int level,
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unsigned int ns);
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unsigned long create_romem_block(unsigned long output_addr,
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unsigned int level,
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unsigned int ns);
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unsigned long create_rwmem_block(unsigned long output_addr,
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unsigned int level,
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unsigned int ns);
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******************************************************************************/
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uint64_t create_table_desc(uint64_t *next_table_ptr);
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uint64_t create_block_desc(uint64_t desc, uint64_t addr, uint32_t level);
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uint64_t create_device_block(uint64_t output_addr, uint32_t level, uint32_t ns);
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uint64_t create_romem_block(uint64_t output_addr, uint32_t level, uint32_t ns);
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uint64_t create_rwmem_block(uint64_t output_addr, uint32_t level, uint32_t ns);
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/*******************************************************************************
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* TLB maintenance accessor prototypes
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******************************************************************************/
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void tlbialle1(void);
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void tlbialle1is(void);
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void tlbialle2(void);
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void tlbialle2is(void);
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void tlbialle3(void);
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void tlbialle3is(void);
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void tlbivmalle1(void);
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DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
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DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
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DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
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DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
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DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3)
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DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is)
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DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
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/*******************************************************************************
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* Cache maintenance accessor prototypes
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******************************************************************************/
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void dcisw(unsigned long);
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void dccisw(unsigned long);
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void dccsw(unsigned long);
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void dccvac(unsigned long);
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void dcivac(unsigned long);
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void dccivac(unsigned long);
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void dccvau(unsigned long);
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void dczva(unsigned long);
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void flush_dcache_range(unsigned long, unsigned long);
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void inv_dcache_range(unsigned long, unsigned long);
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void dcsw_op_louis(unsigned int);
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void dcsw_op_all(unsigned int);
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau)
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DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, zva)
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void flush_dcache_range(uint64_t, uint64_t);
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void inv_dcache_range(uint64_t, uint64_t);
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void dcsw_op_louis(uint32_t);
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void dcsw_op_all(uint32_t);
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void disable_mmu_el3(void);
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void disable_mmu_icache_el3(void);
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@ -84,202 +147,159 @@ void disable_mmu_icache_el3(void);
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/*******************************************************************************
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* Misc. accessor prototypes
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******************************************************************************/
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void enable_irq(void);
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void enable_fiq(void);
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void enable_serror(void);
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void enable_debug_exceptions(void);
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void disable_irq(void);
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void disable_fiq(void);
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void disable_serror(void);
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void disable_debug_exceptions(void);
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DEFINE_SYSREG_WRITE_CONST_FUNC(daifset)
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DEFINE_SYSREG_WRITE_CONST_FUNC(daifclr)
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unsigned long read_id_pfr1_el1(void);
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unsigned long read_id_aa64pfr0_el1(void);
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unsigned long read_current_el(void);
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unsigned long read_daif(void);
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unsigned long read_spsr_el1(void);
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unsigned long read_spsr_el2(void);
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unsigned long read_spsr_el3(void);
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unsigned long read_elr_el1(void);
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unsigned long read_elr_el2(void);
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unsigned long read_elr_el3(void);
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#define enable_irq() write_daifclr(DAIF_IRQ_BIT)
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#define enable_fiq() write_daifclr(DAIF_FIQ_BIT)
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#define enable_serror() write_daifclr(DAIF_ABT_BIT)
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#define enable_debug_exceptions() write_daifclr(DAIF_DBG_BIT)
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#define disable_irq() write_daifset(DAIF_IRQ_BIT)
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#define disable_fiq() write_daifset(DAIF_FIQ_BIT)
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#define disable_serror() write_daifset(DAIF_ABT_BIT)
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#define disable_debug_exceptions() write_daifset(DAIF_DBG_BIT)
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void write_daif(unsigned long);
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void write_spsr_el1(unsigned long);
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void write_spsr_el2(unsigned long);
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void write_spsr_el3(unsigned long);
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void write_elr_el1(unsigned long);
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void write_elr_el2(unsigned long);
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void write_elr_el3(unsigned long);
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DEFINE_SYSREG_READ_FUNC(id_pfr1_el1)
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DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
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DEFINE_SYSREG_READ_FUNC(CurrentEl)
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DEFINE_SYSREG_RW_FUNCS(daif)
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DEFINE_SYSREG_RW_FUNCS(spsr_el1)
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DEFINE_SYSREG_RW_FUNCS(spsr_el2)
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DEFINE_SYSREG_RW_FUNCS(spsr_el3)
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DEFINE_SYSREG_RW_FUNCS(elr_el1)
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DEFINE_SYSREG_RW_FUNCS(elr_el2)
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DEFINE_SYSREG_RW_FUNCS(elr_el3)
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void wfi(void);
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void wfe(void);
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void rfe(void);
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void sev(void);
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void dsb(void);
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void isb(void);
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DEFINE_SYSOP_FUNC(wfi)
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DEFINE_SYSOP_FUNC(wfe)
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DEFINE_SYSOP_FUNC(sev)
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DEFINE_SYSOP_TYPE_FUNC(dsb, sy)
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DEFINE_SYSOP_FUNC(isb)
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unsigned int get_afflvl_shift(unsigned int);
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unsigned int mpidr_mask_lower_afflvls(unsigned long, unsigned int);
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uint32_t get_afflvl_shift(uint32_t);
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uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t);
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void __dead2 eret(unsigned long, unsigned long,
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unsigned long, unsigned long,
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unsigned long, unsigned long,
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unsigned long, unsigned long);
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void __dead2 smc(unsigned long, unsigned long,
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unsigned long, unsigned long,
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unsigned long, unsigned long,
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unsigned long, unsigned long);
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void __dead2 eret(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3,
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uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7);
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void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3,
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uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7);
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/*******************************************************************************
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* System register accessor prototypes
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******************************************************************************/
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unsigned long read_midr(void);
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unsigned long read_mpidr(void);
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DEFINE_SYSREG_READ_FUNC(midr_el1)
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DEFINE_SYSREG_READ_FUNC(mpidr_el1)
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unsigned long read_scr(void);
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unsigned long read_hcr(void);
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DEFINE_SYSREG_RW_FUNCS(scr_el3)
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DEFINE_SYSREG_RW_FUNCS(hcr_el2)
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unsigned long read_vbar_el1(void);
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unsigned long read_vbar_el2(void);
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unsigned long read_vbar_el3(void);
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DEFINE_SYSREG_RW_FUNCS(vbar_el1)
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DEFINE_SYSREG_RW_FUNCS(vbar_el2)
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DEFINE_SYSREG_RW_FUNCS(vbar_el3)
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unsigned long read_sctlr_el1(void);
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unsigned long read_sctlr_el2(void);
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unsigned long read_sctlr_el3(void);
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DEFINE_SYSREG_RW_FUNCS(sctlr_el1)
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DEFINE_SYSREG_RW_FUNCS(sctlr_el2)
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DEFINE_SYSREG_RW_FUNCS(sctlr_el3)
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unsigned long read_actlr_el1(void);
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unsigned long read_actlr_el2(void);
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unsigned long read_actlr_el3(void);
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DEFINE_SYSREG_RW_FUNCS(actlr_el1)
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DEFINE_SYSREG_RW_FUNCS(actlr_el2)
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DEFINE_SYSREG_RW_FUNCS(actlr_el3)
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unsigned long read_esr_el1(void);
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unsigned long read_esr_el2(void);
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unsigned long read_esr_el3(void);
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DEFINE_SYSREG_RW_FUNCS(esr_el1)
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DEFINE_SYSREG_RW_FUNCS(esr_el2)
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DEFINE_SYSREG_RW_FUNCS(esr_el3)
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unsigned long read_afsr0_el1(void);
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unsigned long read_afsr0_el2(void);
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unsigned long read_afsr0_el3(void);
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DEFINE_SYSREG_RW_FUNCS(afsr0_el1)
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DEFINE_SYSREG_RW_FUNCS(afsr0_el2)
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DEFINE_SYSREG_RW_FUNCS(afsr0_el3)
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unsigned long read_afsr1_el1(void);
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unsigned long read_afsr1_el2(void);
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unsigned long read_afsr1_el3(void);
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DEFINE_SYSREG_RW_FUNCS(afsr1_el1)
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DEFINE_SYSREG_RW_FUNCS(afsr1_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(afsr1_el3)
|
||||
|
||||
unsigned long read_far_el1(void);
|
||||
unsigned long read_far_el2(void);
|
||||
unsigned long read_far_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(far_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(far_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(far_el3)
|
||||
|
||||
unsigned long read_mair_el1(void);
|
||||
unsigned long read_mair_el2(void);
|
||||
unsigned long read_mair_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(mair_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(mair_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(mair_el3)
|
||||
|
||||
unsigned long read_amair_el1(void);
|
||||
unsigned long read_amair_el2(void);
|
||||
unsigned long read_amair_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(amair_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(amair_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(amair_el3)
|
||||
|
||||
unsigned long read_rvbar_el1(void);
|
||||
unsigned long read_rvbar_el2(void);
|
||||
unsigned long read_rvbar_el3(void);
|
||||
DEFINE_SYSREG_READ_FUNC(rvbar_el1)
|
||||
DEFINE_SYSREG_READ_FUNC(rvbar_el2)
|
||||
DEFINE_SYSREG_READ_FUNC(rvbar_el3)
|
||||
|
||||
unsigned long read_rmr_el1(void);
|
||||
unsigned long read_rmr_el2(void);
|
||||
unsigned long read_rmr_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(rmr_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(rmr_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(rmr_el3)
|
||||
|
||||
unsigned long read_tcr_el1(void);
|
||||
unsigned long read_tcr_el2(void);
|
||||
unsigned long read_tcr_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(tcr_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(tcr_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(tcr_el3)
|
||||
|
||||
unsigned long read_ttbr0_el1(void);
|
||||
unsigned long read_ttbr0_el2(void);
|
||||
unsigned long read_ttbr0_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(ttbr0_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(ttbr0_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(ttbr0_el3)
|
||||
|
||||
unsigned long read_ttbr1_el1(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(ttbr1_el1)
|
||||
|
||||
unsigned long read_cptr_el2(void);
|
||||
unsigned long read_cptr_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(cptr_el2)
|
||||
DEFINE_SYSREG_RW_FUNCS(cptr_el3)
|
||||
|
||||
unsigned long read_cpacr(void);
|
||||
unsigned long read_cpuectlr(void);
|
||||
unsigned int read_cntfrq_el0(void);
|
||||
unsigned int read_cntps_ctl_el1(void);
|
||||
unsigned int read_cntps_tval_el1(void);
|
||||
unsigned long read_cntps_cval_el1(void);
|
||||
unsigned long read_cntpct_el0(void);
|
||||
unsigned long read_cnthctl_el2(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(cpacr_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(cntfrq_el0)
|
||||
DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1)
|
||||
DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1)
|
||||
DEFINE_SYSREG_READ_FUNC(cntpct_el0)
|
||||
DEFINE_SYSREG_RW_FUNCS(cnthctl_el2)
|
||||
|
||||
unsigned long read_tpidr_el3(void);
|
||||
DEFINE_SYSREG_RW_FUNCS(tpidr_el3)
|
||||
|
||||
void write_scr(unsigned long);
|
||||
void write_hcr(unsigned long);
|
||||
void write_cpacr(unsigned long);
|
||||
void write_cntfrq_el0(unsigned int);
|
||||
void write_cntps_ctl_el1(unsigned int);
|
||||
void write_cntps_tval_el1(unsigned int);
|
||||
void write_cntps_cval_el1(unsigned long);
|
||||
void write_cnthctl_el2(unsigned long);
|
||||
/* Implementation specific registers */
|
||||
|
||||
void write_vbar_el1(unsigned long);
|
||||
void write_vbar_el2(unsigned long);
|
||||
void write_vbar_el3(unsigned long);
|
||||
DEFINE_RENAME_SYSREG_RW_FUNCS(cpuectlr_el1, CPUECTLR_EL1)
|
||||
|
||||
void write_sctlr_el1(unsigned long);
|
||||
void write_sctlr_el2(unsigned long);
|
||||
void write_sctlr_el3(unsigned long);
|
||||
/* GICv3 System Registers */
|
||||
|
||||
void write_actlr_el1(unsigned long);
|
||||
void write_actlr_el2(unsigned long);
|
||||
void write_actlr_el3(unsigned long);
|
||||
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el1, ICC_SRE_EL1)
|
||||
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2)
|
||||
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3)
|
||||
DEFINE_RENAME_SYSREG_RW_FUNCS(icc_pmr_el1, ICC_PMR_EL1)
|
||||
|
||||
void write_esr_el1(unsigned long);
|
||||
void write_esr_el2(unsigned long);
|
||||
void write_esr_el3(unsigned long);
|
||||
|
||||
void write_afsr0_el1(unsigned long);
|
||||
void write_afsr0_el2(unsigned long);
|
||||
void write_afsr0_el3(unsigned long);
|
||||
|
||||
void write_afsr1_el1(unsigned long);
|
||||
void write_afsr1_el2(unsigned long);
|
||||
void write_afsr1_el3(unsigned long);
|
||||
|
||||
void write_far_el1(unsigned long);
|
||||
void write_far_el2(unsigned long);
|
||||
void write_far_el3(unsigned long);
|
||||
|
||||
void write_mair_el1(unsigned long);
|
||||
void write_mair_el2(unsigned long);
|
||||
void write_mair_el3(unsigned long);
|
||||
|
||||
void write_amair_el1(unsigned long);
|
||||
void write_amair_el2(unsigned long);
|
||||
void write_amair_el3(unsigned long);
|
||||
|
||||
void write_rmr_el1(unsigned long);
|
||||
void write_rmr_el2(unsigned long);
|
||||
void write_rmr_el3(unsigned long);
|
||||
|
||||
void write_tcr_el1(unsigned long);
|
||||
void write_tcr_el2(unsigned long);
|
||||
void write_tcr_el3(unsigned long);
|
||||
|
||||
void write_ttbr0_el1(unsigned long);
|
||||
void write_ttbr0_el2(unsigned long);
|
||||
void write_ttbr0_el3(unsigned long);
|
||||
|
||||
void write_ttbr1_el1(unsigned long);
|
||||
|
||||
void write_cpuectlr(unsigned long);
|
||||
void write_cptr_el2(unsigned long);
|
||||
void write_cptr_el3(unsigned long);
|
||||
|
||||
void write_tpidr_el3(unsigned long);
|
||||
|
||||
#define IS_IN_EL(x) \
|
||||
(GET_EL(read_current_el()) == MODE_EL##x)
|
||||
(GET_EL(read_CurrentEl()) == MODE_EL##x)
|
||||
|
||||
#define IS_IN_EL1() IS_IN_EL(1)
|
||||
#define IS_IN_EL3() IS_IN_EL(3)
|
||||
|
||||
/* Previously defined accesor functions with incomplete register names */
|
||||
|
||||
#define read_current_el() read_CurrentEl()
|
||||
|
||||
#define dsb() dsbsy()
|
||||
|
||||
#define read_midr() read_midr_el1()
|
||||
|
||||
#define read_mpidr() read_mpidr_el1()
|
||||
|
||||
#define read_scr() read_scr_el3()
|
||||
#define write_scr(_v) write_scr_el3(_v)
|
||||
|
||||
#define read_hcr() read_hcr_el2()
|
||||
#define write_hcr(_v) write_hcr_el2(_v)
|
||||
|
||||
#define read_cpuectlr() read_cpuectlr_el1()
|
||||
#define write_cpuectlr(_v) write_cpuectlr_el1(_v)
|
||||
|
||||
#define read_cpacr() read_cpacr_el1()
|
||||
#define write_cpacr(_v) write_cpacr_el1(_v)
|
||||
|
||||
#endif /* __ARCH_HELPERS_H__ */
|
||||
|
|
|
|||
|
|
@ -31,59 +31,11 @@
|
|||
#include <arch.h>
|
||||
#include <asm_macros.S>
|
||||
|
||||
.globl dcisw
|
||||
.globl dccisw
|
||||
.globl dccsw
|
||||
.globl dccvac
|
||||
.globl dcivac
|
||||
.globl dccivac
|
||||
.globl dccvau
|
||||
.globl dczva
|
||||
.globl flush_dcache_range
|
||||
.globl inv_dcache_range
|
||||
.globl dcsw_op_louis
|
||||
.globl dcsw_op_all
|
||||
|
||||
func dcisw
|
||||
dc isw, x0
|
||||
ret
|
||||
|
||||
|
||||
func dccisw
|
||||
dc cisw, x0
|
||||
ret
|
||||
|
||||
|
||||
func dccsw
|
||||
dc csw, x0
|
||||
ret
|
||||
|
||||
|
||||
func dccvac
|
||||
dc cvac, x0
|
||||
ret
|
||||
|
||||
|
||||
func dcivac
|
||||
dc ivac, x0
|
||||
ret
|
||||
|
||||
|
||||
func dccivac
|
||||
dc civac, x0
|
||||
ret
|
||||
|
||||
|
||||
func dccvau
|
||||
dc cvau, x0
|
||||
ret
|
||||
|
||||
|
||||
func dczva
|
||||
dc zva, x0
|
||||
ret
|
||||
|
||||
|
||||
/* ------------------------------------------
|
||||
* Clean+Invalidate from base address till
|
||||
* size. 'x0' = addr, 'x1' = size
|
||||
|
|
|
|||
|
|
@ -31,44 +31,8 @@
|
|||
#include <arch.h>
|
||||
#include <asm_macros.S>
|
||||
|
||||
.globl enable_irq
|
||||
.globl disable_irq
|
||||
|
||||
.globl enable_fiq
|
||||
.globl disable_fiq
|
||||
|
||||
.globl enable_serror
|
||||
.globl disable_serror
|
||||
|
||||
.globl enable_debug_exceptions
|
||||
.globl disable_debug_exceptions
|
||||
|
||||
.globl read_daif
|
||||
.globl write_daif
|
||||
|
||||
.globl read_spsr_el1
|
||||
.globl read_spsr_el2
|
||||
.globl read_spsr_el3
|
||||
|
||||
.globl write_spsr_el1
|
||||
.globl write_spsr_el2
|
||||
.globl write_spsr_el3
|
||||
|
||||
.globl read_elr_el1
|
||||
.globl read_elr_el2
|
||||
.globl read_elr_el3
|
||||
|
||||
.globl write_elr_el1
|
||||
.globl write_elr_el2
|
||||
.globl write_elr_el3
|
||||
|
||||
.globl get_afflvl_shift
|
||||
.globl mpidr_mask_lower_afflvls
|
||||
.globl dsb
|
||||
.globl isb
|
||||
.globl sev
|
||||
.globl wfe
|
||||
.globl wfi
|
||||
.globl eret
|
||||
.globl smc
|
||||
|
||||
|
|
@ -78,6 +42,10 @@
|
|||
.globl disable_mmu_el3
|
||||
.globl disable_mmu_icache_el3
|
||||
|
||||
#if SUPPORT_VFP
|
||||
.globl enable_vfp
|
||||
#endif
|
||||
|
||||
|
||||
func get_afflvl_shift
|
||||
cmp x0, #3
|
||||
|
|
@ -95,144 +63,6 @@ func mpidr_mask_lower_afflvls
|
|||
lsl x0, x0, x2
|
||||
ret
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* Asynchronous exception manipulation accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func enable_irq
|
||||
msr daifclr, #DAIF_IRQ_BIT
|
||||
ret
|
||||
|
||||
|
||||
func enable_fiq
|
||||
msr daifclr, #DAIF_FIQ_BIT
|
||||
ret
|
||||
|
||||
|
||||
func enable_serror
|
||||
msr daifclr, #DAIF_ABT_BIT
|
||||
ret
|
||||
|
||||
|
||||
func enable_debug_exceptions
|
||||
msr daifclr, #DAIF_DBG_BIT
|
||||
ret
|
||||
|
||||
|
||||
func disable_irq
|
||||
msr daifset, #DAIF_IRQ_BIT
|
||||
ret
|
||||
|
||||
|
||||
func disable_fiq
|
||||
msr daifset, #DAIF_FIQ_BIT
|
||||
ret
|
||||
|
||||
|
||||
func disable_serror
|
||||
msr daifset, #DAIF_ABT_BIT
|
||||
ret
|
||||
|
||||
|
||||
func disable_debug_exceptions
|
||||
msr daifset, #DAIF_DBG_BIT
|
||||
ret
|
||||
|
||||
|
||||
func read_daif
|
||||
mrs x0, daif
|
||||
ret
|
||||
|
||||
|
||||
func write_daif
|
||||
msr daif, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_spsr_el1
|
||||
mrs x0, spsr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_spsr_el2
|
||||
mrs x0, spsr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_spsr_el3
|
||||
mrs x0, spsr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_spsr_el1
|
||||
msr spsr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_spsr_el2
|
||||
msr spsr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_spsr_el3
|
||||
msr spsr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_elr_el1
|
||||
mrs x0, elr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_elr_el2
|
||||
mrs x0, elr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_elr_el3
|
||||
mrs x0, elr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_elr_el1
|
||||
msr elr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_elr_el2
|
||||
msr elr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_elr_el3
|
||||
msr elr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
func dsb
|
||||
dsb sy
|
||||
ret
|
||||
|
||||
|
||||
func isb
|
||||
isb
|
||||
ret
|
||||
|
||||
|
||||
func sev
|
||||
sev
|
||||
ret
|
||||
|
||||
|
||||
func wfe
|
||||
wfe
|
||||
ret
|
||||
|
||||
|
||||
func wfi
|
||||
wfi
|
||||
ret
|
||||
|
||||
|
||||
func eret
|
||||
eret
|
||||
|
|
@ -315,3 +145,20 @@ func disable_mmu_icache_el3
|
|||
mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
|
||||
b do_disable_mmu
|
||||
|
||||
|
||||
/* ---------------------------------------------------------------------------
|
||||
* Enable the use of VFP at EL3
|
||||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
#if SUPPORT_VFP
|
||||
func enable_vfp
|
||||
mrs x0, cpacr_el1
|
||||
orr x0, x0, #CPACR_VFP_BITS
|
||||
msr cpacr_el1, x0
|
||||
mrs x0, cptr_el3
|
||||
mov x1, #AARCH64_CPTR_TFP
|
||||
bic x0, x0, x1
|
||||
msr cptr_el3, x0
|
||||
isb
|
||||
ret
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,782 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without specific
|
||||
* prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <arch.h>
|
||||
#include <asm_macros.S>
|
||||
|
||||
.globl read_vbar_el1
|
||||
.globl read_vbar_el2
|
||||
.globl read_vbar_el3
|
||||
.globl write_vbar_el1
|
||||
.globl write_vbar_el2
|
||||
.globl write_vbar_el3
|
||||
|
||||
.globl read_sctlr_el1
|
||||
.globl read_sctlr_el2
|
||||
.globl read_sctlr_el3
|
||||
.globl write_sctlr_el1
|
||||
.globl write_sctlr_el2
|
||||
.globl write_sctlr_el3
|
||||
|
||||
.globl read_actlr_el1
|
||||
.globl read_actlr_el2
|
||||
.globl read_actlr_el3
|
||||
.globl write_actlr_el1
|
||||
.globl write_actlr_el2
|
||||
.globl write_actlr_el3
|
||||
|
||||
.globl read_esr_el1
|
||||
.globl read_esr_el2
|
||||
.globl read_esr_el3
|
||||
.globl write_esr_el1
|
||||
.globl write_esr_el2
|
||||
.globl write_esr_el3
|
||||
|
||||
.globl read_afsr0_el1
|
||||
.globl read_afsr0_el2
|
||||
.globl read_afsr0_el3
|
||||
.globl write_afsr0_el1
|
||||
.globl write_afsr0_el2
|
||||
.globl write_afsr0_el3
|
||||
|
||||
.globl read_afsr1_el1
|
||||
.globl read_afsr1_el2
|
||||
.globl read_afsr1_el3
|
||||
.globl write_afsr1_el1
|
||||
.globl write_afsr1_el2
|
||||
.globl write_afsr1_el3
|
||||
|
||||
.globl read_far_el1
|
||||
.globl read_far_el2
|
||||
.globl read_far_el3
|
||||
.globl write_far_el1
|
||||
.globl write_far_el2
|
||||
.globl write_far_el3
|
||||
|
||||
.globl read_mair_el1
|
||||
.globl read_mair_el2
|
||||
.globl read_mair_el3
|
||||
.globl write_mair_el1
|
||||
.globl write_mair_el2
|
||||
.globl write_mair_el3
|
||||
|
||||
.globl read_amair_el1
|
||||
.globl read_amair_el2
|
||||
.globl read_amair_el3
|
||||
.globl write_amair_el1
|
||||
.globl write_amair_el2
|
||||
.globl write_amair_el3
|
||||
|
||||
.globl read_rvbar_el1
|
||||
.globl read_rvbar_el2
|
||||
.globl read_rvbar_el3
|
||||
|
||||
.globl read_rmr_el1
|
||||
.globl read_rmr_el2
|
||||
.globl read_rmr_el3
|
||||
.globl write_rmr_el1
|
||||
.globl write_rmr_el2
|
||||
.globl write_rmr_el3
|
||||
|
||||
.globl read_tcr_el1
|
||||
.globl read_tcr_el2
|
||||
.globl read_tcr_el3
|
||||
.globl write_tcr_el1
|
||||
.globl write_tcr_el2
|
||||
.globl write_tcr_el3
|
||||
|
||||
.globl read_cptr_el2
|
||||
.globl read_cptr_el3
|
||||
.globl write_cptr_el2
|
||||
.globl write_cptr_el3
|
||||
|
||||
.globl read_ttbr0_el1
|
||||
.globl read_ttbr0_el2
|
||||
.globl read_ttbr0_el3
|
||||
.globl write_ttbr0_el1
|
||||
.globl write_ttbr0_el2
|
||||
.globl write_ttbr0_el3
|
||||
|
||||
.globl read_ttbr1_el1
|
||||
.globl write_ttbr1_el1
|
||||
|
||||
.globl read_cpacr
|
||||
.globl write_cpacr
|
||||
|
||||
.globl read_cntfrq
|
||||
.globl write_cntfrq
|
||||
|
||||
.globl read_cpuectlr
|
||||
.globl write_cpuectlr
|
||||
|
||||
.globl read_cnthctl_el2
|
||||
.globl write_cnthctl_el2
|
||||
|
||||
.globl read_cntfrq_el0
|
||||
.globl write_cntfrq_el0
|
||||
|
||||
.globl read_cntps_ctl_el1
|
||||
.globl write_cntps_ctl_el1
|
||||
|
||||
.globl read_cntps_cval_el1
|
||||
.globl write_cntps_cval_el1
|
||||
|
||||
.globl read_cntps_tval_el1
|
||||
.globl write_cntps_tval_el1
|
||||
|
||||
.globl read_scr
|
||||
.globl write_scr
|
||||
|
||||
.globl read_hcr
|
||||
.globl write_hcr
|
||||
|
||||
.globl read_midr
|
||||
.globl read_mpidr
|
||||
|
||||
.globl read_cntpct_el0
|
||||
.globl read_current_el
|
||||
.globl read_id_pfr1_el1
|
||||
.globl read_id_aa64pfr0_el1
|
||||
|
||||
.globl write_tpidr_el3
|
||||
.globl read_tpidr_el3
|
||||
|
||||
#if SUPPORT_VFP
|
||||
.globl enable_vfp
|
||||
#endif
|
||||
|
||||
|
||||
func read_current_el
|
||||
mrs x0, CurrentEl
|
||||
ret
|
||||
|
||||
|
||||
func read_id_pfr1_el1
|
||||
mrs x0, id_pfr1_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_id_aa64pfr0_el1
|
||||
mrs x0, id_aa64pfr0_el1
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* VBAR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_vbar_el1
|
||||
mrs x0, vbar_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_vbar_el2
|
||||
mrs x0, vbar_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_vbar_el3
|
||||
mrs x0, vbar_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_vbar_el1
|
||||
msr vbar_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_vbar_el2
|
||||
msr vbar_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_vbar_el3
|
||||
msr vbar_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* AFSR0 accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_afsr0_el1
|
||||
mrs x0, afsr0_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_afsr0_el2
|
||||
mrs x0, afsr0_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_afsr0_el3
|
||||
mrs x0, afsr0_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_afsr0_el1
|
||||
msr afsr0_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_afsr0_el2
|
||||
msr afsr0_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_afsr0_el3
|
||||
msr afsr0_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* FAR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_far_el1
|
||||
mrs x0, far_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_far_el2
|
||||
mrs x0, far_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_far_el3
|
||||
mrs x0, far_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_far_el1
|
||||
msr far_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_far_el2
|
||||
msr far_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_far_el3
|
||||
msr far_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* MAIR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_mair_el1
|
||||
mrs x0, mair_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_mair_el2
|
||||
mrs x0, mair_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_mair_el3
|
||||
mrs x0, mair_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_mair_el1
|
||||
msr mair_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_mair_el2
|
||||
msr mair_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_mair_el3
|
||||
msr mair_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* AMAIR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_amair_el1
|
||||
mrs x0, amair_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_amair_el2
|
||||
mrs x0, amair_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_amair_el3
|
||||
mrs x0, amair_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_amair_el1
|
||||
msr amair_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_amair_el2
|
||||
msr amair_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_amair_el3
|
||||
msr amair_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* RVBAR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_rvbar_el1
|
||||
mrs x0, rvbar_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_rvbar_el2
|
||||
mrs x0, rvbar_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_rvbar_el3
|
||||
mrs x0, rvbar_el3
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* RMR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_rmr_el1
|
||||
mrs x0, rmr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_rmr_el2
|
||||
mrs x0, rmr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_rmr_el3
|
||||
mrs x0, rmr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_rmr_el1
|
||||
msr rmr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_rmr_el2
|
||||
msr rmr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_rmr_el3
|
||||
msr rmr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* AFSR1 accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_afsr1_el1
|
||||
mrs x0, afsr1_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_afsr1_el2
|
||||
mrs x0, afsr1_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_afsr1_el3
|
||||
mrs x0, afsr1_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_afsr1_el1
|
||||
msr afsr1_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_afsr1_el2
|
||||
msr afsr1_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_afsr1_el3
|
||||
msr afsr1_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* SCTLR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_sctlr_el1
|
||||
mrs x0, sctlr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_sctlr_el2
|
||||
mrs x0, sctlr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_sctlr_el3
|
||||
mrs x0, sctlr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_sctlr_el1
|
||||
msr sctlr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_sctlr_el2
|
||||
msr sctlr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_sctlr_el3
|
||||
msr sctlr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* ACTLR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_actlr_el1
|
||||
mrs x0, actlr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_actlr_el2
|
||||
mrs x0, actlr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_actlr_el3
|
||||
mrs x0, actlr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_actlr_el1
|
||||
msr actlr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_actlr_el2
|
||||
msr actlr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_actlr_el3
|
||||
msr actlr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* ESR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_esr_el1
|
||||
mrs x0, esr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_esr_el2
|
||||
mrs x0, esr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_esr_el3
|
||||
mrs x0, esr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_esr_el1
|
||||
msr esr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_esr_el2
|
||||
msr esr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_esr_el3
|
||||
msr esr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* TCR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_tcr_el1
|
||||
mrs x0, tcr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_tcr_el2
|
||||
mrs x0, tcr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_tcr_el3
|
||||
mrs x0, tcr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_tcr_el1
|
||||
msr tcr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_tcr_el2
|
||||
msr tcr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_tcr_el3
|
||||
msr tcr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* CPTR accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_cptr_el2
|
||||
mrs x0, cptr_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_cptr_el3
|
||||
mrs x0, cptr_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_cptr_el2
|
||||
msr cptr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_cptr_el3
|
||||
msr cptr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* TTBR0 accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_ttbr0_el1
|
||||
mrs x0, ttbr0_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_ttbr0_el2
|
||||
mrs x0, ttbr0_el2
|
||||
ret
|
||||
|
||||
|
||||
func read_ttbr0_el3
|
||||
mrs x0, ttbr0_el3
|
||||
ret
|
||||
|
||||
|
||||
func write_ttbr0_el1
|
||||
msr ttbr0_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_ttbr0_el2
|
||||
msr ttbr0_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_ttbr0_el3
|
||||
msr ttbr0_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
/* -----------------------------------------------------
|
||||
* TTBR1 accessors
|
||||
* -----------------------------------------------------
|
||||
*/
|
||||
func read_ttbr1_el1
|
||||
mrs x0, ttbr1_el1
|
||||
ret
|
||||
|
||||
|
||||
func write_ttbr1_el1
|
||||
msr ttbr1_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_hcr
|
||||
mrs x0, hcr_el2
|
||||
ret
|
||||
|
||||
|
||||
func write_hcr
|
||||
msr hcr_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_cpacr
|
||||
mrs x0, cpacr_el1
|
||||
ret
|
||||
|
||||
|
||||
func write_cpacr
|
||||
msr cpacr_el1, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_cntfrq_el0
|
||||
mrs x0, cntfrq_el0
|
||||
ret
|
||||
|
||||
|
||||
func write_cntfrq_el0
|
||||
msr cntfrq_el0, x0
|
||||
ret
|
||||
|
||||
func read_cntps_ctl_el1
|
||||
mrs x0, cntps_ctl_el1
|
||||
ret
|
||||
|
||||
func write_cntps_ctl_el1
|
||||
msr cntps_ctl_el1, x0
|
||||
ret
|
||||
|
||||
func read_cntps_cval_el1
|
||||
mrs x0, cntps_cval_el1
|
||||
ret
|
||||
|
||||
func write_cntps_cval_el1
|
||||
msr cntps_cval_el1, x0
|
||||
ret
|
||||
|
||||
func read_cntps_tval_el1
|
||||
mrs x0, cntps_tval_el1
|
||||
ret
|
||||
|
||||
func write_cntps_tval_el1
|
||||
msr cntps_tval_el1, x0
|
||||
ret
|
||||
|
||||
func read_cntpct_el0
|
||||
mrs x0, cntpct_el0
|
||||
ret
|
||||
|
||||
func read_cpuectlr
|
||||
mrs x0, CPUECTLR_EL1
|
||||
ret
|
||||
|
||||
|
||||
func write_cpuectlr
|
||||
msr CPUECTLR_EL1, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_cnthctl_el2
|
||||
mrs x0, cnthctl_el2
|
||||
ret
|
||||
|
||||
|
||||
func write_cnthctl_el2
|
||||
msr cnthctl_el2, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_cntfrq
|
||||
mrs x0, cntfrq_el0
|
||||
ret
|
||||
|
||||
|
||||
func write_cntfrq
|
||||
msr cntfrq_el0, x0
|
||||
ret
|
||||
|
||||
|
||||
func write_scr
|
||||
msr scr_el3, x0
|
||||
ret
|
||||
|
||||
|
||||
func read_scr
|
||||
mrs x0, scr_el3
|
||||
ret
|
||||
|
||||
|
||||
func read_midr
|
||||
mrs x0, midr_el1
|
||||
ret
|
||||
|
||||
|
||||
func read_mpidr
|
||||
mrs x0, mpidr_el1
|
||||
ret
|
||||
|
||||
func write_tpidr_el3
|
||||
msr tpidr_el3, x0
|
||||
ret
|
||||
|
||||
func read_tpidr_el3
|
||||
mrs x0, tpidr_el3
|
||||
ret
|
||||
|
||||
#if SUPPORT_VFP
|
||||
func enable_vfp
|
||||
mrs x0, cpacr_el1
|
||||
orr x0, x0, #CPACR_VFP_BITS
|
||||
msr cpacr_el1, x0
|
||||
mrs x0, cptr_el3
|
||||
mov x1, #AARCH64_CPTR_TFP
|
||||
bic x0, x0, x1
|
||||
msr cptr_el3, x0
|
||||
isb
|
||||
ret
|
||||
|
||||
#endif
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without specific
|
||||
* prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <asm_macros.S>
|
||||
|
||||
.globl tlbialle1
|
||||
.globl tlbialle1is
|
||||
.globl tlbialle2
|
||||
.globl tlbialle2is
|
||||
.globl tlbialle3
|
||||
.globl tlbialle3is
|
||||
.globl tlbivmalle1
|
||||
|
||||
|
||||
func tlbialle1
|
||||
tlbi alle1
|
||||
ret
|
||||
|
||||
|
||||
func tlbialle1is
|
||||
tlbi alle1is
|
||||
ret
|
||||
|
||||
|
||||
func tlbialle2
|
||||
tlbi alle2
|
||||
ret
|
||||
|
||||
|
||||
func tlbialle2is
|
||||
tlbi alle2is
|
||||
ret
|
||||
|
||||
|
||||
func tlbialle3
|
||||
tlbi alle3
|
||||
ret
|
||||
|
||||
|
||||
func tlbialle3is
|
||||
tlbi alle3is
|
||||
ret
|
||||
|
||||
func tlbivmalle1
|
||||
tlbi vmalle1
|
||||
ret
|
||||
|
|
@ -51,7 +51,6 @@ PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/pl011.c \
|
|||
drivers/io/io_memmap.c \
|
||||
drivers/io/io_semihosting.c \
|
||||
lib/mmio.c \
|
||||
lib/aarch64/sysreg_helpers.S \
|
||||
lib/aarch64/xlat_tables.c \
|
||||
lib/semihosting/semihosting.c \
|
||||
lib/semihosting/aarch64/semihosting_call.S \
|
||||
|
|
@ -72,7 +71,6 @@ BL2_SOURCES += drivers/arm/tzc400/tzc400.c \
|
|||
|
||||
BL31_SOURCES += drivers/arm/gic/gic_v2.c \
|
||||
drivers/arm/gic/gic_v3.c \
|
||||
drivers/arm/gic/aarch64/gic_v3_sysregs.S \
|
||||
drivers/arm/cci400/cci400.c \
|
||||
plat/common/aarch64/platform_mp_stack.S \
|
||||
plat/fvp/bl31_fvp_setup.c \
|
||||
|
|
|
|||
Loading…
Reference in New Issue