allwinner: Fix incorrect ARISC code patch offset check
The current range check for the offset is wrong: it is counting bytes, while indexing an array of uint32_t. Since the offset is always zero, the parameter is unnecessary. Instead of adding more code to fix the check, remove the parameter to avoid the problem entirely. Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Iadfc7d027155adc754e017b3462233ce9a1d64f6
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -20,7 +20,6 @@ void sunxi_security_setup(void);
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uint16_t sunxi_read_soc_id(void);
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void sunxi_set_gpio_out(char port, int pin, bool level_high);
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int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb);
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void sunxi_execute_arisc_code(uint32_t *code, size_t size,
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int patch_offset, uint16_t param);
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void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param);
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#endif /* SUNXI_PRIVATE_H */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -172,8 +172,7 @@ DEFINE_BAKERY_LOCK(arisc_lock);
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* in SRAM, put the address of that into the reset vector and release the
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* arisc reset line. The SCP will execute that code and pull the line up again.
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*/
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void sunxi_execute_arisc_code(uint32_t *code, size_t size,
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int patch_offset, uint16_t param)
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void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param)
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{
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uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE - 0x4000 + 0x100;
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@ -187,8 +186,7 @@ void sunxi_execute_arisc_code(uint32_t *code, size_t size,
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} while (1);
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/* Patch up the code to feed in an input parameter. */
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if (patch_offset >= 0 && patch_offset <= (size - 4))
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code[patch_offset] = (code[patch_offset] & ~0xffff) | param;
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code[0] = (code[0] & ~0xffff) | param;
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clean_dcache_range((uintptr_t)code, size);
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/*
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@ -78,7 +78,7 @@ void sunxi_cpu_off(u_register_t mpidr)
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* patched into the first instruction.
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*/
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sunxi_execute_arisc_code(arisc_core_off, sizeof(arisc_core_off),
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0, BIT_32(core));
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BIT_32(core));
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}
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void sunxi_cpu_on(u_register_t mpidr)
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