From 5d1c211e225d40d2926bf34483c90f907a6c5dc3 Mon Sep 17 00:00:00 2001 From: Abhyuday Godhasara Date: Wed, 4 Aug 2021 23:58:46 -0700 Subject: [PATCH] fix(plat/xilinx/versal): resolve misra R10.3 in pm services MISRA Violation: MISRA-C:2012 R.10.3 - The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category Signed-off-by: Abhyuday Godhasara Change-Id: I73c056ff4df2f14e04c92a49ac5c97e578e82107 --- plat/xilinx/versal/include/versal_def.h | 20 +++--- plat/xilinx/versal/pm_service/pm_api_sys.c | 12 ++-- plat/xilinx/versal/pm_service/pm_client.c | 10 +-- plat/xilinx/versal/pm_service/pm_defs.h | 16 ++--- plat/xilinx/versal/pm_service/pm_svc_main.c | 70 ++++++++++----------- 5 files changed, 64 insertions(+), 64 deletions(-) diff --git a/plat/xilinx/versal/include/versal_def.h b/plat/xilinx/versal/include/versal_def.h index 001fb04ac..e8f9a8290 100644 --- a/plat/xilinx/versal/include/versal_def.h +++ b/plat/xilinx/versal/include/versal_def.h @@ -112,19 +112,19 @@ #define FPD_MAINCCI_SIZE 0x00100000 /* APU registers and bitfields */ -#define FPD_APU_BASE 0xFD5C0000 -#define FPD_APU_CONFIG_0 (FPD_APU_BASE + 0x20) -#define FPD_APU_RVBAR_L_0 (FPD_APU_BASE + 0x40) -#define FPD_APU_RVBAR_H_0 (FPD_APU_BASE + 0x44) -#define FPD_APU_PWRCTL (FPD_APU_BASE + 0x90) +#define FPD_APU_BASE 0xFD5C0000U +#define FPD_APU_CONFIG_0 (FPD_APU_BASE + 0x20U) +#define FPD_APU_RVBAR_L_0 (FPD_APU_BASE + 0x40U) +#define FPD_APU_RVBAR_H_0 (FPD_APU_BASE + 0x44U) +#define FPD_APU_PWRCTL (FPD_APU_BASE + 0x90U) -#define FPD_APU_CONFIG_0_VINITHI_SHIFT 8 -#define APU_0_PWRCTL_CPUPWRDWNREQ_MASK 1 -#define APU_1_PWRCTL_CPUPWRDWNREQ_MASK 2 +#define FPD_APU_CONFIG_0_VINITHI_SHIFT 8U +#define APU_0_PWRCTL_CPUPWRDWNREQ_MASK 1U +#define APU_1_PWRCTL_CPUPWRDWNREQ_MASK 2U /* PMC registers and bitfields */ -#define PMC_GLOBAL_BASE 0xF1110000 -#define PMC_GLOBAL_GLOB_GEN_STORAGE4 (PMC_GLOBAL_BASE + 0x40) +#define PMC_GLOBAL_BASE 0xF1110000U +#define PMC_GLOBAL_GLOB_GEN_STORAGE4 (PMC_GLOBAL_BASE + 0x40U) /* IPI registers and bitfields */ #define IPI0_REG_BASE 0xFF330000 diff --git a/plat/xilinx/versal/pm_service/pm_api_sys.c b/plat/xilinx/versal/pm_service/pm_api_sys.c index f85cdf10f..f67b3e85c 100644 --- a/plat/xilinx/versal/pm_service/pm_api_sys.c +++ b/plat/xilinx/versal/pm_service/pm_api_sys.c @@ -21,10 +21,10 @@ /********************************************************************* * Target module IDs macros ********************************************************************/ -#define LIBPM_MODULE_ID 0x2 -#define LOADER_MODULE_ID 0x7 +#define LIBPM_MODULE_ID 0x2U +#define LOADER_MODULE_ID 0x7U -#define MODE 0x80000000 +#define MODE 0x80000000U /* default shutdown/reboot scope is system(2) */ static unsigned int pm_shutdown_scope = XPM_SHUTDOWN_SUBTYPE_RST_SYSTEM; @@ -42,7 +42,7 @@ unsigned int pm_get_shutdown_scope(void) * Assigning of argument values into array elements. */ #define PM_PACK_PAYLOAD1(pl, mid, flag, arg0) { \ - pl[0] = (uint32_t)((uint32_t)((arg0) & 0xFF) | (mid << 8) | ((flag) << 24)); \ + pl[0] = (uint32_t)((uint32_t)((arg0) & 0xFFU) | (mid << 8U) | ((flag) << 24U)); \ } #define PM_PACK_PAYLOAD2(pl, mid, flag, arg0, arg1) { \ @@ -833,7 +833,7 @@ enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2, ret = pm_feature_check(PM_QUERY_DATA, &version, flag); if (PM_RET_SUCCESS == ret) { - fw_api_version = version & 0xFFFF ; + fw_api_version = version & 0xFFFFU; if ((2U == fw_api_version) && ((XPM_QID_CLOCK_GET_NAME == qid) || (XPM_QID_PINCTRL_GET_FUNCTION_NAME == qid))) { @@ -888,7 +888,7 @@ enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id, return PM_RET_ERROR_ARGS; } gicd_write_irouter(gicv3_driver_data->gicd_base, - PLAT_VERSAL_IPI_IRQ, MODE); + (unsigned int)PLAT_VERSAL_IPI_IRQ, MODE); ret = PM_RET_SUCCESS; break; default: diff --git a/plat/xilinx/versal/pm_service/pm_client.c b/plat/xilinx/versal/pm_service/pm_client.c index 5f20c3f45..311a64295 100644 --- a/plat/xilinx/versal/pm_service/pm_client.c +++ b/plat/xilinx/versal/pm_service/pm_client.c @@ -23,8 +23,8 @@ #include "pm_client.h" #define UNDEFINED_CPUID (~0) -#define IRQ_MAX 142 -#define NUM_GICD_ISENABLER ((IRQ_MAX >> 5) + 1) +#define IRQ_MAX 142U +#define NUM_GICD_ISENABLER ((IRQ_MAX >> 5U) + 1U) DEFINE_BAKERY_LOCK(pm_client_secure_lock); @@ -124,7 +124,7 @@ static void pm_client_set_wakeup_sources(uint32_t node_id) zeromem(&pm_wakeup_nodes_set, (u_register_t)sizeof(pm_wakeup_nodes_set)); - for (reg_num = 0; reg_num < NUM_GICD_ISENABLER; reg_num++) { + for (reg_num = 0U; reg_num < NUM_GICD_ISENABLER; reg_num++) { uint32_t base_irq = reg_num << ISENABLER_SHIFT; uint32_t reg = mmio_read_32(isenabler1 + (reg_num << 2)); @@ -171,7 +171,7 @@ void pm_client_suspend(const struct pm_proc *proc, unsigned int state) bakery_lock_get(&pm_client_secure_lock); if (state == PM_STATE_SUSPEND_TO_RAM) { - pm_client_set_wakeup_sources(proc->node_id); + pm_client_set_wakeup_sources((uint32_t)proc->node_id); } /* Set powerdown request */ @@ -209,7 +209,7 @@ void pm_client_abort_suspend(void) */ static unsigned int pm_get_cpuid(uint32_t nid) { - for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) { + for (size_t i = 0U; i < ARRAY_SIZE(pm_procs_all); i++) { if (pm_procs_all[i].node_id == nid) { return i; } diff --git a/plat/xilinx/versal/pm_service/pm_defs.h b/plat/xilinx/versal/pm_service/pm_defs.h index ccb2617ca..08b46e2d1 100644 --- a/plat/xilinx/versal/pm_service/pm_defs.h +++ b/plat/xilinx/versal/pm_service/pm_defs.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020, Xilinx, Inc. All rights reserved. + * Copyright (c) 2019-2021, Xilinx, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -33,8 +33,8 @@ XPM_NODESUBCL_DEV_PERIPH, \ XPM_NODETYPE_DEV_PERIPH, (IDX)) -#define PM_GET_CALLBACK_DATA 0xa01 -#define PM_GET_TRUSTZONE_VERSION 0xa03 +#define PM_GET_CALLBACK_DATA 0xa01U +#define PM_GET_TRUSTZONE_VERSION 0xa03U /* PM API Versions */ #define PM_API_BASE_VERSION 1U @@ -88,11 +88,11 @@ #define PM_LOAD_PDI 0x701U /* IOCTL IDs for clock driver */ -#define IOCTL_SET_PLL_FRAC_MODE 8 -#define IOCTL_GET_PLL_FRAC_MODE 9 -#define IOCTL_SET_PLL_FRAC_DATA 10 -#define IOCTL_GET_PLL_FRAC_DATA 11 -#define IOCTL_SET_SGI 25 +#define IOCTL_SET_PLL_FRAC_MODE 8U +#define IOCTL_GET_PLL_FRAC_MODE 9U +#define IOCTL_SET_PLL_FRAC_DATA 10U +#define IOCTL_GET_PLL_FRAC_DATA 11U +#define IOCTL_SET_SGI 25U /* Parameter ID for PLL IOCTLs */ /* Fractional data portion for PLL */ diff --git a/plat/xilinx/versal/pm_service/pm_svc_main.c b/plat/xilinx/versal/pm_service/pm_svc_main.c index c7ca30a5f..26d1c476d 100644 --- a/plat/xilinx/versal/pm_service/pm_svc_main.c +++ b/plat/xilinx/versal/pm_service/pm_svc_main.c @@ -20,24 +20,24 @@ #include #define XSCUGIC_SGIR_EL1_INITID_SHIFT 24U -#define INVALID_SGI 0xFF +#define INVALID_SGI 0xFFU DEFINE_RENAME_SYSREG_RW_FUNCS(icc_asgi1r_el1, S3_0_C12_C11_6) /* pm_up = true - UP, pm_up = false - DOWN */ static bool pm_up; -static unsigned int sgi = INVALID_SGI; +static unsigned int sgi = (unsigned int)INVALID_SGI; static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle, void *cookie) { - int cpu; + unsigned int cpu; unsigned int reg; (void)plat_ic_acknowledge_interrupt(); - cpu = plat_my_core_pos() + 1; + cpu = plat_my_core_pos() + 1U; - if (sgi != INVALID_SGI) { - reg = (cpu | (sgi << XSCUGIC_SGIR_EL1_INITID_SHIFT)); + if ((unsigned int)sgi != (unsigned int)INVALID_SGI) { + reg = (cpu | ((unsigned int)sgi << (unsigned int)XSCUGIC_SGIR_EL1_INITID_SHIFT)); write_icc_asgi1r_el1(reg); } @@ -60,7 +60,7 @@ static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle, */ int pm_register_sgi(unsigned int sgi_num) { - if (sgi != INVALID_SGI) { + if ((unsigned int)sgi != (unsigned int)INVALID_SGI) { return -EBUSY; } @@ -68,7 +68,7 @@ int pm_register_sgi(unsigned int sgi_num) return -EINVAL; } - sgi = sgi_num; + sgi = (unsigned int)sgi_num; return 0; } @@ -208,8 +208,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t api_version; ret = pm_get_api_version(&api_version, security_flag); - SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | - ((uint64_t)api_version << 32)); + SMC_RET1(handle, (u_register_t)PM_RET_SUCCESS | + ((u_register_t)api_version << 32)); } case PM_GET_DEVICE_STATUS: @@ -217,8 +217,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t buff[3]; ret = pm_get_device_status(pm_arg[0], buff, security_flag); - SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buff[0] << 32), - (uint64_t)buff[1] | ((uint64_t)buff[2] << 32)); + SMC_RET2(handle, (u_register_t)ret | ((u_register_t)buff[0] << 32), + (u_register_t)buff[1] | ((u_register_t)buff[2] << 32)); } case PM_RESET_ASSERT: @@ -231,8 +231,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ret = pm_reset_get_status(pm_arg[0], &reset_status, security_flag); - SMC_RET1(handle, (uint64_t)ret | - ((uint64_t)reset_status << 32)); + SMC_RET1(handle, (u_register_t)ret | + ((u_register_t)reset_status << 32)); } case PM_INIT_FINALIZE: @@ -245,8 +245,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, pm_get_callbackdata(result, ARRAY_SIZE(result), security_flag); SMC_RET2(handle, - (uint64_t)result[0] | ((uint64_t)result[1] << 32), - (uint64_t)result[2] | ((uint64_t)result[3] << 32)); + (u_register_t)result[0] | ((u_register_t)result[1] << 32), + (u_register_t)result[2] | ((u_register_t)result[3] << 32)); } case PM_PINCTRL_REQUEST: @@ -262,7 +262,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t value = 0; ret = pm_pinctrl_get_function(pm_arg[0], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value) << 32); } case PM_PINCTRL_SET_FUNCTION: @@ -276,7 +276,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ret = pm_pinctrl_get_pin_param(pm_arg[0], pm_arg[1], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value) << 32); } case PM_PINCTRL_CONFIG_PARAM_SET: @@ -290,7 +290,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ret = pm_api_ioctl(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value) << 32); } case PM_QUERY_DATA: @@ -300,8 +300,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ret = pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], data, security_flag); - SMC_RET2(handle, (uint64_t)ret | ((uint64_t)data[0] << 32), - (uint64_t)data[1] | ((uint64_t)data[2] << 32)); + SMC_RET2(handle, (u_register_t)ret | ((u_register_t)data[0] << 32), + (u_register_t)data[1] | ((u_register_t)data[2] << 32)); } case PM_CLOCK_ENABLE: @@ -317,7 +317,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t value; ret = pm_clock_get_state(pm_arg[0], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value) << 32); } case PM_CLOCK_SETDIVIDER: @@ -329,7 +329,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t value; ret = pm_clock_get_divider(pm_arg[0], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value) << 32); } case PM_CLOCK_SETPARENT: @@ -341,7 +341,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t value; ret = pm_clock_get_parent(pm_arg[0], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value) << 32); } case PM_CLOCK_GETRATE: @@ -349,8 +349,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t rate[2] = { 0 }; ret = pm_clock_get_rate(pm_arg[0], rate, security_flag); - SMC_RET2(handle, (uint64_t)ret | ((uint64_t)rate[0] << 32), - (uint64_t)rate[1] | ((uint64_t)0U << 32)); + SMC_RET2(handle, (u_register_t)ret | ((u_register_t)rate[0] << 32), + (u_register_t)rate[1] | ((u_register_t)0U << 32)); } case PM_PLL_SET_PARAMETER: @@ -364,7 +364,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ret = pm_pll_get_param(pm_arg[0], pm_arg[1], &value, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value << 32)); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)value << 32)); } case PM_PLL_SET_MODE: @@ -376,7 +376,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t mode; ret = pm_pll_get_mode(pm_arg[0], &mode, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32)); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)mode << 32)); } case PM_GET_TRUSTZONE_VERSION: @@ -388,8 +388,8 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t result[2]; ret = pm_get_chipid(result, security_flag); - SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), - (uint64_t)result[1] | ((uint64_t)0U << 32)); + SMC_RET2(handle, (u_register_t)ret | ((u_register_t)result[0] << 32), + (u_register_t)result[1] | ((u_register_t)0U << 32)); } case PM_FEATURE_CHECK: @@ -397,14 +397,14 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t version; ret = pm_feature_check(pm_arg[0], &version, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)version << 32)); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)version << 32)); } case PM_LOAD_PDI: { ret = pm_load_pdi(pm_arg[0], pm_arg[1], pm_arg[2], security_flag); - SMC_RET1(handle, (uint64_t)ret); + SMC_RET1(handle, (u_register_t)ret); } case PM_GET_OP_CHARACTERISTIC: @@ -413,20 +413,20 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, ret = pm_get_op_characteristic(pm_arg[0], pm_arg[1], &result, security_flag); - SMC_RET1(handle, (uint64_t)ret | ((uint64_t)result << 32)); + SMC_RET1(handle, (u_register_t)ret | ((u_register_t)result << 32)); } case PM_SET_MAX_LATENCY: { ret = pm_set_max_latency(pm_arg[0], pm_arg[1], security_flag); - SMC_RET1(handle, (uint64_t)ret); + SMC_RET1(handle, (u_register_t)ret); } case PM_REGISTER_NOTIFIER: { ret = pm_register_notifier(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], security_flag); - SMC_RET1(handle, (uint64_t)ret); + SMC_RET1(handle, (u_register_t)ret); } default: