Tegra194: skip notifying MCE in fake system suspend
- In pre-silicon platforms, MCE might not be ready to support system suspend(SC7) - Thus, in fake system suspend mode, bypass waiting for MCE's acknowledgment to enter system suspend Change-Id: Ia3c010ce080c4283ab1233ba82e3e577adca34f6 Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
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@ -22,6 +22,8 @@
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extern void prepare_core_pwr_dwn(void);
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extern uint8_t tegra_fake_system_suspend;
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#if ENABLE_SYSTEM_SUSPEND_CTX_SAVE_TZDRAM
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extern void tegra186_cpu_reset_handler(void);
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extern uint32_t __tegra186_cpu_reset_handler_data,
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@ -133,24 +135,28 @@ int tegra_soc_pwr_domain_suspend(const psci_power_state_t *target_state)
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tegra_smmu_save_context(0);
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#endif
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/* Prepare for system suspend */
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cstate_info.cluster = TEGRA_NVG_CLUSTER_CC6;
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cstate_info.system = TEGRA_NVG_SYSTEM_SC7;
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cstate_info.system_state_force = 1;
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cstate_info.update_wake_mask = 1;
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mce_update_cstate_info(&cstate_info);
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if (tegra_fake_system_suspend == 0U) {
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do {
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val = mce_command_handler(
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MCE_CMD_IS_SC7_ALLOWED,
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TEGRA_NVG_CORE_C7,
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MCE_CORE_SLEEP_TIME_INFINITE,
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0);
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} while (val == 0);
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/* Prepare for system suspend */
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cstate_info.cluster = TEGRA_NVG_CLUSTER_CC6;
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cstate_info.system = TEGRA_NVG_SYSTEM_SC7;
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cstate_info.system_state_force = 1;
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cstate_info.update_wake_mask = 1;
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/* Instruct the MCE to enter system suspend state */
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(void)mce_command_handler(MCE_CMD_ENTER_CSTATE,
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TEGRA_NVG_CORE_C7, MCE_CORE_SLEEP_TIME_INFINITE, 0);
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mce_update_cstate_info(&cstate_info);
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do {
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val = mce_command_handler(
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MCE_CMD_IS_SC7_ALLOWED,
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TEGRA_NVG_CORE_C7,
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MCE_CORE_SLEEP_TIME_INFINITE,
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0);
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} while (val == 0);
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/* Instruct the MCE to enter system suspend state */
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(void)mce_command_handler(MCE_CMD_ENTER_CSTATE,
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TEGRA_NVG_CORE_C7, MCE_CORE_SLEEP_TIME_INFINITE, 0);
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}
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}
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return PSCI_E_SUCCESS;
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