plat/sgi: allow access to nor2 flash and system registers from s-el0

Allow the access of system registers and nor2 flash memory region
from s-el0. This allows the secure parititions residing at s-el0
to access these memory regions.

Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
Change-Id: I3887a86770de806323fbde0d20fdc96eec6e0c3c
This commit is contained in:
Thomas Abraham 2021-02-15 14:14:59 +05:30
parent b4d548f141
commit 5dae6bc71c
4 changed files with 41 additions and 3 deletions

View File

@ -32,7 +32,7 @@
# if SPM_MM
# define PLAT_ARM_MMAP_ENTRIES 9
# define MAX_XLAT_TABLES 7
# define PLAT_SP_IMAGE_MMAP_REGIONS 7
# define PLAT_SP_IMAGE_MMAP_REGIONS 9
# define PLAT_SP_IMAGE_MAX_XLAT_TABLES 10
# else
# define PLAT_ARM_MMAP_ENTRIES (5 + ((CSS_SGI_CHIP_COUNT - 1) * 3))

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -12,4 +12,22 @@
#include <plat/arm/board/common/v2m_def.h>
#include <plat/arm/soc/common/soc_css_def.h>
/* Map the System registers to access from S-EL0 */
#define CSS_SYSTEMREG_DEVICE_BASE (0x1C010000)
#define CSS_SYSTEMREG_DEVICE_SIZE (0x00010000)
#define PLAT_ARM_SECURE_MAP_SYSTEMREG MAP_REGION_FLAT( \
CSS_SYSTEMREG_DEVICE_BASE, \
CSS_SYSTEMREG_DEVICE_SIZE, \
(MT_DEVICE | MT_RW | \
MT_SECURE | MT_USER))
/* Map the NOR2 Flash to access from S-EL0 */
#define CSS_NOR2_FLASH_DEVICE_BASE (0x10000000)
#define CSS_NOR2_FLASH_DEVICE_SIZE (0x04000000)
#define PLAT_ARM_SECURE_MAP_NOR2 MAP_REGION_FLAT( \
CSS_NOR2_FLASH_DEVICE_BASE, \
CSS_NOR2_FLASH_DEVICE_SIZE, \
(MT_DEVICE | MT_RW | \
MT_SECURE | MT_USER))
#endif /* SGI_SOC_PLATFORM_DEF_H */

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -10,4 +10,22 @@
#include <sgi_base_platform_def.h>
#include <sgi_soc_css_def_v2.h>
/* Map the System registers to access from S-EL0 */
#define CSS_SYSTEMREG_DEVICE_BASE (0x0C010000)
#define CSS_SYSTEMREG_DEVICE_SIZE (0x00010000)
#define PLAT_ARM_SECURE_MAP_SYSTEMREG MAP_REGION_FLAT( \
CSS_SYSTEMREG_DEVICE_BASE, \
CSS_SYSTEMREG_DEVICE_SIZE, \
(MT_DEVICE | MT_RW | \
MT_SECURE | MT_USER))
/* Map the NOR2 Flash to access from S-EL0 */
#define CSS_NOR2_FLASH_DEVICE_BASE (0x001054000000)
#define CSS_NOR2_FLASH_DEVICE_SIZE (0x000004000000)
#define PLAT_ARM_SECURE_MAP_NOR2 MAP_REGION_FLAT( \
CSS_NOR2_FLASH_DEVICE_BASE, \
CSS_NOR2_FLASH_DEVICE_SIZE, \
(MT_DEVICE | MT_RW | \
MT_SECURE | MT_USER))
#endif /* SGI_SOC_PLATFORM_DEF_V2_H */

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@ -78,6 +78,8 @@ const mmap_region_t plat_arm_mmap[] = {
#if SPM_MM && defined(IMAGE_BL31)
const mmap_region_t plat_arm_secure_partition_mmap[] = {
PLAT_ARM_SECURE_MAP_SYSTEMREG,
PLAT_ARM_SECURE_MAP_NOR2,
PLAT_ARM_SECURE_MAP_DEVICE,
ARM_SP_IMAGE_MMAP,
ARM_SP_IMAGE_NS_BUF_MMAP,