imx8qm: imx8qx: Migrate to new interfaces
- Migrate to new GIC interfaces. - Migrate to bl31_early_platform_setup2(). - Remove references to removed build options. Change-Id: Ia7c63f75325ea4b41e32a9de3f01b0007d0ae210 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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@ -6,6 +6,7 @@
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#include <bl_common.h>
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#include <bl_common.h>
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#include <gicv3.h>
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#include <gicv3.h>
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#include <interrupt_props.h>
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#include <plat_imx8.h>
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#include <plat_imx8.h>
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#include <platform.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <platform_def.h>
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@ -14,11 +15,12 @@
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/* the GICv3 driver only needs to be initialized in EL3 */
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/* the GICv3 driver only needs to be initialized in EL3 */
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uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
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uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT];
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/* array of Group1 secure interrupts to be configured by the gic driver */
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static const interrupt_prop_t g01s_interrupt_props[] = {
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const unsigned int g1s_interrupt_array[] = { 6 };
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INTR_PROP_DESC(6, GIC_HIGHEST_SEC_PRIORITY,
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INTR_GROUP1S, GIC_INTR_CFG_LEVEL),
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/* array of Group0 interrupts to be configured by the gic driver */
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INTR_PROP_DESC(7, GIC_HIGHEST_SEC_PRIORITY,
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const unsigned int g0_interrupt_array[] = { 7 };
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INTR_GROUP0, GIC_INTR_CFG_LEVEL),
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};
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static unsigned int plat_imx_mpidr_to_core_pos(unsigned long mpidr)
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static unsigned int plat_imx_mpidr_to_core_pos(unsigned long mpidr)
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{
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{
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@ -28,10 +30,8 @@ static unsigned int plat_imx_mpidr_to_core_pos(unsigned long mpidr)
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const gicv3_driver_data_t arm_gic_data = {
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const gicv3_driver_data_t arm_gic_data = {
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.gicd_base = PLAT_GICD_BASE,
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.gicd_base = PLAT_GICD_BASE,
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.gicr_base = PLAT_GICR_BASE,
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.gicr_base = PLAT_GICR_BASE,
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.g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array),
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.interrupt_props = g01s_interrupt_props,
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.g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array),
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.interrupt_props_num = ARRAY_SIZE(g01s_interrupt_props),
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.g0_interrupt_array = g0_interrupt_array,
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.g1s_interrupt_array = g1s_interrupt_array,
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.rdistif_num = PLATFORM_CORE_COUNT,
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.rdistif_num = PLATFORM_CORE_COUNT,
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.rdistif_base_addrs = rdistif_base_addrs,
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.rdistif_base_addrs = rdistif_base_addrs,
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.mpidr_to_core_pos = plat_imx_mpidr_to_core_pos,
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.mpidr_to_core_pos = plat_imx_mpidr_to_core_pos,
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@ -291,8 +291,8 @@ void mx8_partition_resources(void)
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}
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}
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void bl31_early_platform_setup(bl31_params_t *from_bl2,
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void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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void *plat_params_from_bl2)
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u_register_t arg2, u_register_t arg3)
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{
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{
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#if DEBUG_CONSOLE
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#if DEBUG_CONSOLE
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static console_lpuart_t console;
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static console_lpuart_t console;
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@ -32,10 +32,8 @@ BL31_SOURCES += plat/imx/common/lpuart_console.S \
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include plat/imx/common/sci/sci_api.mk
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include plat/imx/common/sci/sci_api.mk
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ENABLE_PLAT_COMPAT := 0
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USE_COHERENT_MEM := 1
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USE_COHERENT_MEM := 1
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RESET_TO_BL31 := 1
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RESET_TO_BL31 := 1
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ARM_GIC_ARCH := 3
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A53_DISABLE_NON_TEMPORAL_HINT := 0
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A53_DISABLE_NON_TEMPORAL_HINT := 0
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MULTI_CONSOLE_API := 1
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MULTI_CONSOLE_API := 1
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ERRATA_A72_859971 := 1
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ERRATA_A72_859971 := 1
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@ -250,8 +250,8 @@ void imx8_partition_resources(void)
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NOTICE("Non-secure Partitioning Succeeded\n");
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NOTICE("Non-secure Partitioning Succeeded\n");
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}
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}
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void bl31_early_platform_setup(bl31_params_t *from_bl2,
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void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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void *plat_params_from_bl2)
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u_register_t arg2, u_register_t arg3)
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{
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{
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#if DEBUG_CONSOLE
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#if DEBUG_CONSOLE
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static console_lpuart_t console;
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static console_lpuart_t console;
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@ -30,8 +30,6 @@ BL31_SOURCES += plat/imx/common/lpuart_console.S \
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include plat/imx/common/sci/sci_api.mk
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include plat/imx/common/sci/sci_api.mk
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ENABLE_PLAT_COMPAT := 0
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USE_COHERENT_MEM := 1
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USE_COHERENT_MEM := 1
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RESET_TO_BL31 := 1
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RESET_TO_BL31 := 1
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ARM_GIC_ARCH := 3
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MULTI_CONSOLE_API := 1
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MULTI_CONSOLE_API := 1
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