From 61531a274d3c3f47af9f5ae4c3220a4868e6a3c6 Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Tue, 14 Feb 2017 10:16:18 +0000 Subject: [PATCH] AArch32: Fix normal memory bakery compilation This patch fixes a compilation issue with bakery locks when PSCI library is compiled with USE_COHERENT_MEM = 0 build option. Change-Id: Ic7f6cf9f2bb37f8a946eafbee9cbc3bf0dc7e900 Signed-off-by: Soby Mathew --- lib/locks/bakery/bakery_lock_normal.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/lib/locks/bakery/bakery_lock_normal.c b/lib/locks/bakery/bakery_lock_normal.c index 5a2fb0717..a3a6c002f 100644 --- a/lib/locks/bakery/bakery_lock_normal.c +++ b/lib/locks/bakery/bakery_lock_normal.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -178,8 +178,11 @@ void bakery_lock_get(bakery_lock_t *lock) unsigned int their_bakery_data; me = plat_my_core_pos(); - +#ifdef AARCH32 + is_cached = read_sctlr() & SCTLR_C_BIT; +#else is_cached = read_sctlr_el3() & SCTLR_C_BIT; +#endif /* Get a ticket */ my_ticket = bakery_get_ticket(lock, me, is_cached); @@ -231,7 +234,11 @@ void bakery_lock_get(bakery_lock_t *lock) void bakery_lock_release(bakery_lock_t *lock) { bakery_info_t *my_bakery_info; +#ifdef AARCH32 + unsigned int is_cached = read_sctlr() & SCTLR_C_BIT; +#else unsigned int is_cached = read_sctlr_el3() & SCTLR_C_BIT; +#endif my_bakery_info = get_bakery_info(plat_my_core_pos(), lock);