Merge pull request #1669 from sandrine-bailleux-arm/sb/rm-tzc-top-fn
Remove unneeded _tzc_get_max_top_addr() function
This commit is contained in:
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621daddb60
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@ -182,8 +182,8 @@ void tzc400_configure_region(unsigned int filters,
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* Do address range check based on TZC configuration. A 64bit address is
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* Do address range check based on TZC configuration. A 64bit address is
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* the max and expected case.
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* the max and expected case.
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*/
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*/
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assert(((region_top <= _tzc_get_max_top_addr(tzc400.addr_width)) &&
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assert((region_top <= (UINT64_MAX >> (64U - tzc400.addr_width))) &&
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(region_base < region_top)));
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(region_base < region_top));
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/* region_base and (region_top + 1) must be 4KB aligned */
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/* region_base and (region_top + 1) must be 4KB aligned */
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assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
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assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
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@ -180,39 +180,4 @@ static inline unsigned int _tzc_read_peripheral_id(uintptr_t base)
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return id;
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return id;
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}
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}
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#if ENABLE_ASSERTIONS
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#ifdef AARCH32
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static inline unsigned long long _tzc_get_max_top_addr(unsigned int addr_width)
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{
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/*
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* Assume at least 32 bit wide address and initialize the max.
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* This function doesn't use 64-bit integer arithmetic to avoid
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* having to implement additional compiler library functions.
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*/
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unsigned long long addr_mask = 0xFFFFFFFFU;
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uint32_t *addr_ptr = (uint32_t *)&addr_mask;
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assert(addr_width >= 32U);
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/* This logic works only on little - endian platforms */
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assert((read_sctlr() & SCTLR_EE_BIT) == 0U);
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/*
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* If required address width is greater than 32, populate the higher
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* 32 bits of the 64 bit field with the max address.
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*/
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if (addr_width > 32U)
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*(addr_ptr + 1U) = ((1U << (addr_width - 32U)) - 1U);
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return addr_mask;
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}
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#else
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static inline unsigned long long _tzc_get_max_top_addr(unsigned int addr_width)
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{
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return UINT64_MAX >> (64U - addr_width);
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}
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#endif /* AARCH32 */
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#endif /* ENABLE_ASSERTIONS */
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#endif /* TZC_COMMON_PRIVATE_H */
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#endif /* TZC_COMMON_PRIVATE_H */
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@ -188,7 +188,7 @@ void tzc_dmc500_configure_region(unsigned int region_no,
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* Do address range check based on DMC-TZ configuration. A 43bit address
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* Do address range check based on DMC-TZ configuration. A 43bit address
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* is the max and expected case.
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* is the max and expected case.
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*/
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*/
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assert(((region_top <= _tzc_get_max_top_addr(43)) &&
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assert(((region_top <= (UINT64_MAX >> (64U - 43U))) &&
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(region_base < region_top)));
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(region_base < region_top)));
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/* region_base and (region_top + 1) must be 4KB aligned */
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/* region_base and (region_top + 1) must be 4KB aligned */
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@ -27,27 +27,28 @@
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#if defined(__ELF__)
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#if defined(__ELF__)
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#define FNALIAS(alias_name, original_name) \
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#define FNALIAS(alias_name, original_name) \
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void alias_name() __attribute__((alias(#original_name)))
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void alias_name() __attribute__((__alias__(#original_name)))
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#define COMPILER_RT_ALIAS(aliasee) __attribute__((__alias__(#aliasee)))
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#else
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#else
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#define FNALIAS(alias, name) _Pragma("GCC error(\"alias unsupported on this file format\")")
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#define FNALIAS(alias, name) _Pragma("GCC error(\"alias unsupported on this file format\")")
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#define COMPILER_RT_ALIAS(aliasee) _Pragma("GCC error(\"alias unsupported on this file format\")")
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#endif
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#endif
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/* ABI macro definitions */
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/* ABI macro definitions */
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#if __ARM_EABI__
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#if __ARM_EABI__
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# define ARM_EABI_FNALIAS(aeabi_name, name) \
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void __aeabi_##aeabi_name() __attribute__((alias("__" #name)));
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# ifdef COMPILER_RT_ARMHF_TARGET
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# ifdef COMPILER_RT_ARMHF_TARGET
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# define COMPILER_RT_ABI
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# define COMPILER_RT_ABI
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# else
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# else
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# define COMPILER_RT_ABI __attribute__((pcs("aapcs")))
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# define COMPILER_RT_ABI __attribute__((__pcs__("aapcs")))
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# endif
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# endif
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#else
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#else
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# define ARM_EABI_FNALIAS(aeabi_name, name)
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# define COMPILER_RT_ABI
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# define COMPILER_RT_ABI
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#endif
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#endif
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#ifdef _MSC_VER
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#define AEABI_RTABI __attribute__((__pcs__("aapcs")))
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#if defined(_MSC_VER) && !defined(__clang__)
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#define ALWAYS_INLINE __forceinline
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#define ALWAYS_INLINE __forceinline
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#define NOINLINE __declspec(noinline)
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#define NOINLINE __declspec(noinline)
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#define NORETURN __declspec(noreturn)
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#define NORETURN __declspec(noreturn)
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@ -0,0 +1,45 @@
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/* ===-- lshrdi3.c - Implement __lshrdi3 -----------------------------------===
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*
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* The LLVM Compiler Infrastructure
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*
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* This file is dual licensed under the MIT and the University of Illinois Open
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* Source Licenses. See LICENSE.TXT for details.
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*
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* ===----------------------------------------------------------------------===
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*
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* This file implements __lshrdi3 for the compiler_rt library.
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*
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* ===----------------------------------------------------------------------===
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*/
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#include "int_lib.h"
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/* Returns: logical a >> b */
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/* Precondition: 0 <= b < bits_in_dword */
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COMPILER_RT_ABI di_int
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__lshrdi3(di_int a, si_int b)
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{
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const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
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udwords input;
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udwords result;
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input.all = a;
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if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */
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{
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result.s.high = 0;
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result.s.low = input.s.high >> (b - bits_in_word);
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}
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else /* 0 <= b < bits_in_word */
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{
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if (b == 0)
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return a;
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result.s.high = input.s.high >> b;
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result.s.low = (input.s.high << (bits_in_word - b)) | (input.s.low >> b);
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}
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return result.all;
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}
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#if defined(__ARM_EABI__)
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AEABI_RTABI di_int __aeabi_llsr(di_int a, si_int b) COMPILER_RT_ALIAS(__lshrdi3);
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#endif
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@ -31,5 +31,6 @@
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ifeq (${ARCH},aarch32)
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ifeq (${ARCH},aarch32)
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COMPILER_RT_SRCS := lib/compiler-rt/builtins/arm/aeabi_uldivmod.S \
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COMPILER_RT_SRCS := lib/compiler-rt/builtins/arm/aeabi_uldivmod.S \
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lib/compiler-rt/builtins/udivmoddi4.c \
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lib/compiler-rt/builtins/udivmoddi4.c \
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lib/compiler-rt/builtins/ctzdi2.c
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lib/compiler-rt/builtins/ctzdi2.c \
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lib/compiler-rt/builtins/lshrdi3.c
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endif
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endif
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