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stm32mp1: enable PIE for BL32 

In order to prepare future support of FIP, BL32 (SP_min) is compiled
as Position Independent Executable.

Change-Id: I15e7cc433fb03e1833002f4fe2eaecb6ed42eb47
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
This commit is contained in:
Yann Gautier 2021-02-10 18:19:23 +01:00
parent d2130da2b5
commit 62fbb31516
4 changed files with 14 additions and 12 deletions
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7
plat/st/stm32mp1/bl2_plat_setup.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -188,11 +188,6 @@ void bl2_el3_plat_arch_setup(void)
mmap_add_region(STM32MP_OPTEE_BASE, STM32MP_OPTEE_BASE,
STM32MP_OPTEE_SIZE,
MT_MEMORY | MT_RW | MT_SECURE);
#else
/* Prevent corruption of preloaded BL32 */
mmap_add_region(BL32_BASE, BL32_BASE,
BL32_LIMIT - BL32_BASE,
MT_RO_DATA | MT_SECURE);
#endif
/* Prevent corruption of preloaded Device Tree */
mmap_add_region(DTB_BASE, DTB_BASE,

7
plat/st/stm32mp1/include/platform_def.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -68,10 +68,15 @@
* BL32 specific defines.
******************************************************************************/
#ifndef AARCH32_SP_OPTEE
#if ENABLE_PIE
#define BL32_BASE 0
#define BL32_LIMIT STM32MP_BL32_SIZE
#else
#define BL32_BASE STM32MP_BL32_BASE
#define BL32_LIMIT (STM32MP_BL32_BASE + \
STM32MP_BL32_SIZE)
#endif
#endif
/*******************************************************************************
* BL33 specific defines.

8
plat/st/stm32mp1/plat_bl2_mem_params_desc.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -28,7 +28,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
SECURE | EXECUTABLE | EP_FIRST_EXE),
#if !defined(AARCH32_SP_OPTEE)
.ep_info.pc = BL32_BASE,
.ep_info.pc = STM32MP_BL32_BASE,
#endif
.ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
SPSR_E_LITTLE,
@ -42,8 +42,8 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
.image_info.image_base = STM32MP_OPTEE_BASE,
.image_info.image_max_size = STM32MP_OPTEE_SIZE,
#else
.image_info.image_base = BL32_BASE,
.image_info.image_max_size = BL32_LIMIT - BL32_BASE,
.image_info.image_base = STM32MP_BL32_BASE,
.image_info.image_max_size = STM32MP_BL32_SIZE,
#endif
.next_handoff_image_id = BL33_IMAGE_ID,
},

4
plat/st/stm32mp1/platform.mk
View File

@ -1,5 +1,5 @@
#
# Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@ -9,6 +9,8 @@ ARM_WITH_NEON := yes
BL2_AT_EL3 := 1
USE_COHERENT_MEM := 0
ENABLE_PIE := 1
STM32_TF_VERSION ?= 0
# Enable dynamic memory mapping